aboutsummaryrefslogtreecommitdiff
path: root/src/soc/amd/picasso/Makefile.inc
diff options
context:
space:
mode:
authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2019-08-21 10:27:05 -0700
committerMartin Roth <martinroth@google.com>2019-09-21 20:35:03 +0000
commit65562cd654e3cd35ca953cfee51a1d7728e21d80 (patch)
treefb1e940690e0e0b3c37187200e8e580c3a68e1d4 /src/soc/amd/picasso/Makefile.inc
parentbf1712422a1978759e41ed985fb5296e85255d70 (diff)
soc/amd/picasso: Use new common SPI code
Use the new SPI code from common folder, delete spi.c. SPI related macros must be single defined, in southbridge.h if they are used by files other than the common SPI code, fch_spi.h if they are only used by the common SPI code. The only exception is SPI_FIFO_DEPTH which must be in southbridge.h, because it can change between SOC. BUG=b:136595978 TEST=None, code already tested with grunt. Change-Id: I68008ce076d348adbdabf7b49cec8783dd7134b4 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso/Makefile.inc')
-rw-r--r--src/soc/amd/picasso/Makefile.inc4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index ee9b407c53..38c00a8dd0 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -47,7 +47,6 @@ romstage-y += memmap.c
romstage-$(CONFIG_PICASSO_UART) += uart.c
romstage-y += tsc_freq.c
romstage-y += southbridge.c
-romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
verstage-y += gpio.c
@@ -56,7 +55,6 @@ verstage-y += pmutil.c
verstage-y += reset.c
verstage-$(CONFIG_PICASSO_UART) += uart.c
verstage-y += tsc_freq.c
-verstage-$(CONFIG_SPI_FLASH) += spi.c
postcar-y += monotonic_timer.c
postcar-$(CONFIG_PICASSO_UART) += uart.c
@@ -83,14 +81,12 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
ramstage-$(CONFIG_PICASSO_UART) += uart.c
ramstage-y += usb.c
ramstage-y += tsc_freq.c
-ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-y += finalize.c
smm-y += smihandler.c
smm-y += smi_util.c
smm-y += tsc_freq.c
smm-$(CONFIG_DEBUG_SMI) += uart.c
-smm-$(CONFIG_SPI_FLASH) += spi.c
smm-y += gpio.c
CPPFLAGS_common += -I$(src)/soc/amd/picasso