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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-11-12 00:14:16 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-11-15 16:48:38 +0000 |
| commit | 60a4643d6f53c2770bede1a649c3f14cafaa8b75 (patch) | |
| tree | c0b2f8f9c69dcd1faeb33e870e8566195edcaefd /src/soc/amd/picasso/Kconfig | |
| parent | 34c59056143f3611083fe8f6a88e9920f6a8531e (diff) | |
soc/amd/common: factor out SMU code from Picasso
The SMU mailbox access code from Picasso can be reused in the next
generation, so factor out the code to soc/amd/common/block/smu. Since
the mailbox register offsets in the indirect address space, the number
of arguments and the message IDs don't always match between different
devices, keep those in the soc-specific directories.
Change-Id: Ibaf5b91ab35428e4c771e7163c6e0c4fc50371e7
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47483
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso/Kconfig')
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 5ae0a2a58f..9ebc65168f 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -41,6 +41,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_HDA select SOC_AMD_COMMON_BLOCK_SATA select SOC_AMD_COMMON_BLOCK_SMBUS + select SOC_AMD_COMMON_BLOCK_SMU select SOC_AMD_COMMON_BLOCK_PSP_GEN2 select PROVIDES_ROM_SHARING select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH |