diff options
| author | Martin Roth <gaumless@gmail.com> | 2023-01-04 21:27:06 -0700 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-01-12 03:13:17 +0000 |
| commit | 20646cdbe80737e3a931dec70a8279163b2a9d60 (patch) | |
| tree | 54a14680804d1cb8cbd0d2000dd0b3ec8319945b /src/soc/amd/phoenix/chipset.cb | |
| parent | ba2cef5b54938cce17871143ea9bbd3fc6868971 (diff) | |
soc/amd: Change Morgana codename to Phoenix
Now that the next generation of APUs is officially announced, we can
unmask morgana.
The chip formerly known as Morgana is actually Phoenix.
Surprise!
This patch just changes the name across the entire codebase.
Note that the fw.cfg file will stay pointing to the
3rdparty/amd_blobs/morgana/psp directory until the amd_blobs_repo is
updated.
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: Ie9492a30ae9ff9cd7e15e0f2d239c32190ad4956
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71731
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/phoenix/chipset.cb')
| -rw-r--r-- | src/soc/amd/phoenix/chipset.cb | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/src/soc/amd/phoenix/chipset.cb b/src/soc/amd/phoenix/chipset.cb new file mode 100644 index 0000000000..0e014391e4 --- /dev/null +++ b/src/soc/amd/phoenix/chipset.cb @@ -0,0 +1,98 @@ +# TODO: Update for Phoenix + +chip soc/amd/phoenix + device cpu_cluster 0 on + ops phoenix_cpu_bus_ops + end + device domain 0 on + ops phoenix_pci_domain_ops + device pci 00.0 alias gnb on ops phoenix_root_complex_operations end + device pci 00.2 alias iommu off ops amd_iommu_ops end + + device pci 01.0 on end # Dummy Host Bridge + + device pci 02.0 on end # Dummy Host Bridge, do not disable + device pci 02.1 alias gpp_bridge_0 off ops amd_external_pcie_gpp_ops end + device pci 02.2 alias gpp_bridge_1 off ops amd_external_pcie_gpp_ops end + device pci 02.3 alias gpp_bridge_2 off ops amd_external_pcie_gpp_ops end + device pci 02.4 alias gpp_bridge_3 off ops amd_external_pcie_gpp_ops end + device pci 02.5 alias gpp_bridge_4 off ops amd_external_pcie_gpp_ops end + device pci 02.6 alias gpp_bridge_5 off ops amd_external_pcie_gpp_ops end + + device pci 08.0 on end # Dummy Host Bridge, do not disable + device pci 08.1 alias gpp_bridge_a off # Internal GPP Bridge 0 to Bus A + ops amd_internal_pcie_gpp_ops + device pci 0.0 alias gfx off ops amd_graphics_ops end # Internal GPU (GFX) + device pci 0.1 alias gfx_hda off end # Display HD Audio Controller (GFXAZ) + device pci 0.2 alias crypto off end # Crypto Coprocessor + device pci 0.3 alias xhci_0 off + chip drivers/usb/acpi + register "type" = "UPC_TYPE_HUB" + device usb 0.0 alias xhci_0_root_hub off + chip drivers/usb/acpi + device usb 3.0 alias usb3_port0 off end + end + chip drivers/usb/acpi + device usb 2.0 alias usb2_port0 off end + end + chip drivers/usb/acpi + device usb 2.1 alias usb2_port1 off end + end + end + end + end + device pci 0.4 alias xhci_1 off + chip drivers/usb/acpi + register "type" = "UPC_TYPE_HUB" + device usb 0.0 alias xhci_1_root_hub off + chip drivers/usb/acpi + device usb 3.0 alias usb3_port2 off end + end + chip drivers/usb/acpi + device usb 3.1 alias usb3_port3 off end + end + chip drivers/usb/acpi + device usb 2.0 alias usb2_port2 off end + end + chip drivers/usb/acpi + device usb 2.1 alias usb2_port3 off end + end + chip drivers/usb/acpi + device usb 2.2 alias usb2_port4 off end + end + end + end + end + device pci 0.5 alias acp off ops amd_acp_ops end # Audio Processor (ACP) + device pci 0.6 alias hda off end # Audio Processor HD Audio Controller (main AZ) + device pci 0.7 alias mp2 off end # Sensor Fusion Hub (MP2) + end + device pci 08.2 alias gpp_bridge_b off ops amd_internal_pcie_gpp_ops end # Internal GPP Bridge 1 to Bus B + device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C + ops amd_internal_pcie_gpp_ops + device pci 0.0 alias xhci_2 off end # Might also be a dummy device with different PCI DID + end + + device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function + device pci 14.3 alias lpc_bridge on ops amd_lpc_ops end + + device pci 18.0 alias data_fabric_0 on ops amd_data_fabric_ops end + device pci 18.1 alias data_fabric_1 on ops amd_data_fabric_ops end + device pci 18.2 alias data_fabric_2 on ops amd_data_fabric_ops end + device pci 18.3 alias data_fabric_3 on ops amd_data_fabric_ops end + device pci 18.4 alias data_fabric_4 on ops amd_data_fabric_ops end + device pci 18.5 alias data_fabric_5 on ops amd_data_fabric_ops end + device pci 18.6 alias data_fabric_6 on ops amd_data_fabric_ops end + device pci 18.7 alias data_fabric_7 on ops amd_data_fabric_ops end + end + + device mmio 0xfedc2000 alias i2c_0 off ops soc_amd_i2c_mmio_ops end + device mmio 0xfedc3000 alias i2c_1 off ops soc_amd_i2c_mmio_ops end + device mmio 0xfedc4000 alias i2c_2 off ops soc_amd_i2c_mmio_ops end + device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end + device mmio 0xfedc9000 alias uart_0 off ops amd_uart_mmio_ops end + device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end + device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end + device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end + device mmio 0xfedd1000 alias uart_4 off ops amd_uart_mmio_ops end +end |