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author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2023-10-16 21:08:57 +0000 |
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committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-10-20 14:26:25 +0000 |
commit | 204a4e6d9f2712dc9f78d44bb9820a7ab859f5d0 (patch) | |
tree | e3d9d789b3781a0626b188c2b0ac7b7e20efc3cf /src/soc/amd/phoenix/chipset.cb | |
parent | 64ba070fd164fc307fe02051e8480db573fc1ac6 (diff) |
soc/amd/common/psp_verstage: Add PSP_VERSTACK_STACK_IS_MAPPED config
Crypto Engine in PSP prefers the buffer from Static RAM (SRAM). Hence if
a buffer comes from within SRAM address range, then it is passed
directly to Crypto Engine. Otherwise a bounce bufer from the stack is
used. But on SoCs like Picasso where PSP Verstage stack is mapped to a
virtual address space this check fails causing a bounce buffer to be
used and hence a stack overflow. Fix this issue by assuming that the
buffer comes from the SRAM always in such SoCs and pass the buffer
directly to crypto engine.
BUG=b:259649666
TEST=Build and boot to OS in Dalboz with unsigned PSP verstage.
Change-Id: I2161c8f0720c770efa5c05aece9584c3cbe7712a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/phoenix/chipset.cb')
0 files changed, 0 insertions, 0 deletions