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authorMartin Roth <gaumless@gmail.com>2023-01-04 21:27:06 -0700
committerMartin L Roth <gaumless@gmail.com>2023-01-12 03:13:17 +0000
commit20646cdbe80737e3a931dec70a8279163b2a9d60 (patch)
tree54a14680804d1cb8cbd0d2000dd0b3ec8319945b /src/soc/amd/phoenix/chip.c
parentba2cef5b54938cce17871143ea9bbd3fc6868971 (diff)
soc/amd: Change Morgana codename to Phoenix
Now that the next generation of APUs is officially announced, we can unmask morgana. The chip formerly known as Morgana is actually Phoenix. Surprise! This patch just changes the name across the entire codebase. Note that the fw.cfg file will stay pointing to the 3rdparty/amd_blobs/morgana/psp directory until the amd_blobs_repo is updated. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: Ie9492a30ae9ff9cd7e15e0f2d239c32190ad4956 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71731 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/phoenix/chip.c')
-rw-r--r--src/soc/amd/phoenix/chip.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/src/soc/amd/phoenix/chip.c b/src/soc/amd/phoenix/chip.c
new file mode 100644
index 0000000000..7f0b93f5a8
--- /dev/null
+++ b/src/soc/amd/phoenix/chip.c
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* TODO: Update for Phoenix */
+
+#include <amdblocks/data_fabric.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <fsp/api.h>
+#include <soc/acpi.h>
+#include <soc/cpu.h>
+#include <soc/pci_devs.h>
+#include <soc/southbridge.h>
+#include <types.h>
+#include "chip.h"
+
+struct device_operations phoenix_cpu_bus_ops = {
+ .read_resources = noop_read_resources,
+ .set_resources = noop_set_resources,
+ .init = mp_cpu_bus_init,
+ .acpi_fill_ssdt = generate_cpu_entries,
+};
+
+static const char *soc_acpi_name(const struct device *dev)
+{
+ if (dev->path.type == DEVICE_PATH_DOMAIN)
+ return "PCI0";
+
+ if (dev->path.type != DEVICE_PATH_PCI)
+ return NULL;
+
+ printk(BIOS_WARNING, "Unknown PCI device: dev: %d, fn: %d\n",
+ PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
+ return NULL;
+};
+
+struct device_operations phoenix_pci_domain_ops = {
+ .read_resources = pci_domain_read_resources,
+ .set_resources = pci_domain_set_resources,
+ .scan_bus = pci_domain_scan_bus,
+ .acpi_name = soc_acpi_name,
+};
+
+static void soc_init(void *chip_info)
+{
+ default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
+
+ fsp_silicon_init();
+
+ data_fabric_set_mmio_np();
+
+ fch_init(chip_info);
+}
+
+static void soc_final(void *chip_info)
+{
+ fch_final(chip_info);
+}
+
+struct chip_operations soc_amd_phoenix_ops = {
+ CHIP_NAME("AMD Phoenix SoC")
+ .init = soc_init,
+ .final = soc_final
+};