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authorMartin Roth <gaumless@gmail.com>2023-02-02 17:21:37 -0700
committerFelix Held <felix-coreboot@felixheld.de>2023-02-04 03:23:15 +0000
commit10c43a2c2e0a68a80bd4fc92732cde037b1d4a34 (patch)
tree384beefd2c651dcbc21f91dff2a64f859339e4d4 /src/soc/amd/phoenix/Kconfig
parent440c8236757de32c6cfd41ef67696f9f09992986 (diff)
soc/amd: Use common reset code for PHX & Glinda SoCs
This switches the Phoenix & Glinda SoCs to use the common reset code. Cezanne and newer do not support warm reset, so use cold resets in all cases (including the OS). Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I4593fa9766ac9e988722a02e355c971e147b8fae Reviewed-on: https://review.coreboot.org/c/coreboot/+/72754 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/phoenix/Kconfig')
-rw-r--r--src/soc/amd/phoenix/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index 883359ccc9..37a2fc9c4c 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -61,6 +61,7 @@ config SOC_AMD_PHOENIX
select SOC_AMD_COMMON_BLOCK_PM
select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
select SOC_AMD_COMMON_BLOCK_PSP_GEN2 # TODO: Check if this is still correct
+ select SOC_AMD_COMMON_BLOCK_RESET
select SOC_AMD_COMMON_BLOCK_SMBUS
select SOC_AMD_COMMON_BLOCK_SMI
select SOC_AMD_COMMON_BLOCK_SMM