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authorTim Van Patten <timvp@google.com>2022-08-23 16:06:33 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-09-12 12:21:01 +0000
commit9244358536aaecff29453b1693fdf202091878ef (patch)
tree4b8136239b03292ffb6d6171af19ca3343a36acf /src/soc/amd/mendocino
parent14bed61ba160093003613fc210b3e6b7af15d964 (diff)
soc/amd: Refactor DPTC Tablet Mode
Refactor AMD DPTC tablet mode in preparation for adding low/no battery DPTC settings. 1. Refactor and simplify acpigen_write_alib_dptc() into the following functions: - acpigen_write_alib_dptc_default() - acpigen_write_alib_dptc_tablet() 2. Add device tree register value dptc_tablet_mode_enable to control whether DPTC tablet mode is enabled for a variant. 3. Add dptc.asl to perform the necessary ACPI checking before modifying the DPTC settings. BRANCH=none BUG=b:217911928 TEST=Build zork TEST=Build nipperkin TEST=Boot skyrim Change-Id: I2518fdd526868c9d5668a6018fd3570392e809c0 Signed-off-by: Tim Van Patten <timvp@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66994 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/mendocino')
-rw-r--r--src/soc/amd/mendocino/Kconfig2
-rw-r--r--src/soc/amd/mendocino/acpi/soc.asl4
-rw-r--r--src/soc/amd/mendocino/chip.h6
-rw-r--r--src/soc/amd/mendocino/root_complex.c17
4 files changed, 17 insertions, 12 deletions
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index d0ce78b29b..7155aaba0a 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -52,7 +52,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_ACP_GEN2
select SOC_AMD_COMMON_BLOCK_ACPI # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
- select SOC_AMD_COMMON_BLOCK_ACPI_ALIB # TODO: Check if this is still correct
+ select SOC_AMD_COMMON_BLOCK_ACPI_ALIB
select SOC_AMD_COMMON_BLOCK_ACPI_CPPC
select SOC_AMD_COMMON_BLOCK_ACPI_GPIO
select SOC_AMD_COMMON_BLOCK_ACPI_IVRS # TODO: Check if this is still correct
diff --git a/src/soc/amd/mendocino/acpi/soc.asl b/src/soc/amd/mendocino/acpi/soc.asl
index f5a41a17cf..5bce314fc0 100644
--- a/src/soc/amd/mendocino/acpi/soc.asl
+++ b/src/soc/amd/mendocino/acpi/soc.asl
@@ -29,10 +29,12 @@ Scope(\_SB) {
#include <soc/amd/common/acpi/upep.asl>
+#include <soc/amd/common/acpi/dptc.asl>
+
#include "rtc_workaround.asl"
/*
- * Platform Wake Notify
+ * Platform Notify
*
* This is called by soc/amd/common/acpi/platform.asl.
*/
diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h
index a1e4eb951f..654294d186 100644
--- a/src/soc/amd/mendocino/chip.h
+++ b/src/soc/amd/mendocino/chip.h
@@ -82,10 +82,10 @@ struct soc_amd_mendocino_config {
uint32_t telemetry_vddcrsocfull_scale_current_mA;
uint32_t telemetry_vddcrsocoffset;
- /* Enable dptc for tablet mode */
- bool dptc_enable;
+ /* Enable dptc tablet mode */
+ bool dptc_tablet_mode_enable;
- /* STAPM Configuration for tablet mode (need enable dptc_enable first) */
+ /* STAPM Configuration for tablet mode */
uint32_t fast_ppt_limit_tablet_mode_mW;
uint32_t slow_ppt_limit_tablet_mode_mW;
uint32_t sustained_power_limit_tablet_mode_mW;
diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c
index a5371f223c..8d15feb6f1 100644
--- a/src/soc/amd/mendocino/root_complex.c
+++ b/src/soc/amd/mendocino/root_complex.c
@@ -188,21 +188,24 @@ static void acipgen_dptci(void)
{
const struct soc_amd_mendocino_config *config = config_of_soc();
- if (!config->dptc_enable)
+ if (!config->dptc_tablet_mode_enable)
return;
+ /* DPTC is enabled. Always fill out the default DPTC values. */
struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC,
- config->sustained_power_limit_mW,
- config->fast_ppt_limit_mW,
- config->slow_ppt_limit_mW);
+ config->sustained_power_limit_mW,
+ config->fast_ppt_limit_mW,
+ config->slow_ppt_limit_mW);
+ acpigen_write_alib_dptc_default((uint8_t *)&default_input, sizeof(default_input));
+
+ /* Tablet Mode */
struct dptc_input tablet_mode_input = DPTC_INPUTS(
config->thermctl_limit_tablet_mode_degreeC,
config->sustained_power_limit_tablet_mode_mW,
config->fast_ppt_limit_tablet_mode_mW,
config->slow_ppt_limit_tablet_mode_mW);
-
- acpigen_write_alib_dptc((uint8_t *)&default_input, sizeof(default_input),
- (uint8_t *)&tablet_mode_input, sizeof(tablet_mode_input));
+ acpigen_write_alib_dptc_tablet((uint8_t *)&tablet_mode_input,
+ sizeof(tablet_mode_input));
}
static void root_complex_fill_ssdt(const struct device *device)