diff options
author | Tim Van Patten <timvp@google.com> | 2022-05-20 11:06:03 -0600 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2022-09-19 10:00:51 +0000 |
commit | 1075fef4459c96375c1a0b7e5f63e47fee11d509 (patch) | |
tree | 2c2be3de7873862433413867bfae574751832d2d /src/soc/amd/mendocino | |
parent | d8210d6ee12aa07e6a04bc861a56a9d099180226 (diff) |
amd/mendocino/root_complex: Throttle SOC during low/no battery
Use dynamic power and thermal configuration (DPTC) via ACPI ALIB calls
to throttle the SOC when there is no battery or critically low battery,
to enable the SOC to boot without overwhelming the AC charger and
browning out.
DPTC is not enabled for low/no battery mode with this CL. It will be
enabled for Skyrim in a following CL.
BRANCH=none
BUG=b:217911928
TEST=Boot skyrim
Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Ifeddb99e97af93b40a5aad960d760e4c101cf086
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67189
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/mendocino')
-rw-r--r-- | src/soc/amd/mendocino/root_complex.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c index 8bb7683b1c..7f54bdee18 100644 --- a/src/soc/amd/mendocino/root_complex.c +++ b/src/soc/amd/mendocino/root_complex.c @@ -210,6 +210,18 @@ static void acipgen_dptci(void) config->vrm_maximum_current_limit_mA, config->vrm_soc_current_limit_mA); acpigen_write_alib_dptc_default((uint8_t *)&default_input, sizeof(default_input)); + + /* Low/No Battery */ + struct dptc_input no_battery_input = DPTC_INPUTS( + config->thermctl_limit_degreeC, + config->sustained_power_limit_mW, + config->fast_ppt_limit_mW, + config->slow_ppt_limit_mW, + config->vrm_current_limit_throttle_mA, + config->vrm_maximum_current_limit_throttle_mA, + config->vrm_soc_current_limit_throttle_mA); + acpigen_write_alib_dptc_no_battery((uint8_t *)&no_battery_input, + sizeof(no_battery_input)); } static void root_complex_fill_ssdt(const struct device *device) |