summaryrefslogtreecommitdiff
path: root/src/soc/amd/mendocino/chip.c
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2022-09-20 14:03:28 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-10-13 19:40:01 +0000
commit7f3807728bdbf2a9a6e9a6177748ff383c47d43d (patch)
tree1c73fbbcb0cf178c5d224226d22666e89b906942 /src/soc/amd/mendocino/chip.c
parentbd15ece78af605bca9fc092baa094c87d5b8244b (diff)
soc/amd/*: Hook up device_operations in chipset.cb
This removes the need for a lot of boilerplate code in the soc code to hook up device_operations to devices. Change-Id: I2afc1855407910f1faa9bdd4e9416dd46474658e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/mendocino/chip.c')
-rw-r--r--src/soc/amd/mendocino/chip.c53
1 files changed, 2 insertions, 51 deletions
diff --git a/src/soc/amd/mendocino/chip.c b/src/soc/amd/mendocino/chip.c
index f71c28586f..99e33ce3e7 100644
--- a/src/soc/amd/mendocino/chip.c
+++ b/src/soc/amd/mendocino/chip.c
@@ -14,15 +14,7 @@
#include <types.h>
#include "chip.h"
-/* Supplied by i2c.c */
-extern struct device_operations soc_amd_i2c_mmio_ops;
-/* Supplied by uart.c */
-extern struct device_operations mendocino_uart_mmio_ops;
-/* Supplied by emmc.c */
-extern struct device_operations mendocino_emmc_mmio_ops;
-
-
-struct device_operations cpu_bus_ops = {
+struct device_operations mendocino_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
@@ -42,53 +34,13 @@ static const char *soc_acpi_name(const struct device *dev)
return NULL;
};
-static struct device_operations pci_domain_ops = {
+struct device_operations mendocino_pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.scan_bus = pci_domain_scan_bus,
.acpi_name = soc_acpi_name,
};
-static void set_mmio_dev_ops(struct device *dev)
-{
- switch (dev->path.mmio.addr) {
- case APU_I2C0_BASE:
- case APU_I2C1_BASE:
- case APU_I2C2_BASE:
- case APU_I2C3_BASE:
- dev->ops = &soc_amd_i2c_mmio_ops;
- break;
- case APU_UART0_BASE:
- case APU_UART1_BASE:
- case APU_UART2_BASE:
- case APU_UART3_BASE:
- case APU_UART4_BASE:
- dev->ops = &mendocino_uart_mmio_ops;
- break;
- case APU_EMMC_BASE:
- dev->ops = &mendocino_emmc_mmio_ops;
- break;
- }
-}
-
-static void enable_dev(struct device *dev)
-{
- /* Set the operations if it is a special bus type */
- switch (dev->path.type) {
- case DEVICE_PATH_DOMAIN:
- dev->ops = &pci_domain_ops;
- break;
- case DEVICE_PATH_CPU_CLUSTER:
- dev->ops = &cpu_bus_ops;
- break;
- case DEVICE_PATH_MMIO:
- set_mmio_dev_ops(dev);
- break;
- default:
- break;
- }
-}
-
static void soc_init(void *chip_info)
{
default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
@@ -107,7 +59,6 @@ static void soc_final(void *chip_info)
struct chip_operations soc_amd_mendocino_ops = {
CHIP_NAME("AMD Mendocino SoC")
- .enable_dev = enable_dev,
.init = soc_init,
.final = soc_final
};