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authorFred Reitberger <reitbergerfred@gmail.com>2023-07-17 09:09:42 -0400
committerFred Reitberger <reitbergerfred@gmail.com>2023-07-24 11:20:10 +0000
commit2a1fc73fdf9fc3db3cdd7d30de3a268c83d339aa (patch)
tree522890e7a5db385d16c4b2af2040922bc7715a8a /src/soc/amd/glinda
parentc53ab57017eba5346f3b2f6d2aa46ba16d18ab86 (diff)
soc/amd/*/Makefile.inc: Do not add APOB NV entry when disabled
Do not add type 0x63 entry to amdfw.rom when APOB_NV cache is disabled. BUG=b:290763369 TEST=boot birman multiple times with/without APOB_NV cache enabled Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: Iefe6f56d7dbedd289680f25a5f372eaa12e967b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76568 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/glinda')
-rw-r--r--src/soc/amd/glinda/Makefile.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc
index a537378372..7d37e6b02a 100644
--- a/src/soc/amd/glinda/Makefile.inc
+++ b/src/soc/amd/glinda/Makefile.inc
@@ -125,10 +125,12 @@ PSP_ELF_FILE=$(objcbfs)/bootblock.elf
PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
+ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y)
# type = 0x63 - construct APOB NV base/size from flash map
# The flashmap section used for this is expected to be named RW_MRC_CACHE
APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE)
APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START)
+endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
# type = 0x6B - PSP Shared memory location