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authorMichał Żygowski <michal.zygowski@3mdeb.com>2022-10-29 21:32:54 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2023-06-23 08:59:50 +0000
commit95be012c11936676f6573880d5fd01826ae6f9fe (patch)
tree6ca992dc8602b24a402d4c6c2d40f5d6ee152281 /src/soc/amd/glinda
parent558d8b79e6b898e0f63772993f578aa4dd42128b (diff)
soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flash
The patch adds a possibility to cache the PCIe 5.0 HSPHY firmware in the SPI flash. New flashmap region is created for that purpose. The goal of caching is to reduce the dependency on CSME and the HECI IP LOAD command which may fail when the CSME is disabled, e.g. soft disabled by HECI command or HAP disabled. This change allows to keep PCIe 5.0 root ports functioning even if CSME/HECI is not functional. TEST=Boot Ubuntu 22.04 on MSI PRO Z690-A and notice PCIe 5.0 port is functional after loading the HSPHY from cache. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I5a37f5b06706ff30d92f60f1bf5dc900edbde96f Reviewed-on: https://review.coreboot.org/c/coreboot/+/68987 Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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