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authorFelix Held <felix-coreboot@felixheld.de>2023-03-23 23:05:50 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-03-24 23:17:02 +0000
commit3f2844fb1ee51b879dee9824d53924ca7c3f5cff (patch)
tree695506bf7152be46191dc544a20c549dfe48528c /src/soc/amd/glinda/chipset.cb
parent6a6d524b0a6383dd054a2e810c24789b5a033b16 (diff)
soc/amd/*/include/msr: add version number to SERIAL_VID_* define names
Picasso and Cezanne use the serial voltage ID 2 standard to communicate the CPU voltage to the voltage regulator module on the mainboard, while Mendocino, Phoenix and Glinda use the serial voltage ID 3 standard for this. Both standards encode the voltage in a different way, so add the serial VID version number to the defines to clarify for which version the define is. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8ddab8df27c86dc2c70a6dfb47908d9405d86240 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73994 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/glinda/chipset.cb')
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