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author | Fred Reitberger <reitbergerfred@gmail.com> | 2023-06-01 18:55:16 -0400 |
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committer | Fred Reitberger <reitbergerfred@gmail.com> | 2023-06-08 17:39:14 +0000 |
commit | 8880baf6bc55a16485f523113e72f119cc9da8c5 (patch) | |
tree | 5a7b58d564d81c0159c00f7442fbcf84ebb1c21a /src/soc/amd/glinda/chipset.cb | |
parent | 301e03fd4a4fa5a8277a7e287ab8d8649a8a90ec (diff) |
mb/google/myst/bootblock.c: Initialize spi flash
Initialize the SPI Flash in bootblock to ensure that
CONFIG_SPI_FLASH_EXIT_4_BYTE_ADDR_MODE will exit 4-byte addressing mode.
BUG=b:285110121
TEST=boot myst and verify flash operations work correctly
Change-Id: Ia88d2b46884b096b4c558bc86513159ec6d35eb5
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75588
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/glinda/chipset.cb')
0 files changed, 0 insertions, 0 deletions