diff options
| author | Maximilian Brune <maximilian.brune@9elements.com> | 2024-07-30 12:46:18 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-09-30 16:22:20 +0000 |
| commit | 540d605f484913b885af9fd2b3084db685770960 (patch) | |
| tree | f268409618a8181d48f27debc7e3facf5b5883f1 /src/soc/amd/glinda/acpi | |
| parent | aed7a871b2520eff698dde22ffdae37f971bd92c (diff) | |
soc/amd/glinda: Update pci int defs
Update IRQs according to datasheet/PPR.
source:
PPR #57254 Rev 1.59 Table 137
Change-Id: I843e5e2b01301eb02cb5be347e122cffbe76d80d
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84375
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/glinda/acpi')
| -rw-r--r-- | src/soc/amd/glinda/acpi/pci_int_defs.asl | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/soc/amd/glinda/acpi/pci_int_defs.asl b/src/soc/amd/glinda/acpi/pci_int_defs.asl index dfbf5c7c12..61ecd449b4 100644 --- a/src/soc/amd/glinda/acpi/pci_int_defs.asl +++ b/src/soc/amd/glinda/acpi/pci_int_defs.asl @@ -22,7 +22,9 @@ IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) { PIRG, 0x00000008, /* Index 6: INTG */ PIRH, 0x00000008, /* Index 7: INTH */ - Offset (0x62), + Offset (0x60), + PGSC, 0x00000008, /* Index 0x60: GEventSci */ + PGSM, 0x00000008, /* Index 0x61: GEventSmi */ PGPI, 0x00000008, /* Index 0x62: GPIO */ Offset (0x70), @@ -32,7 +34,8 @@ IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) { PI23, 0x00000008, /* Index 0x73: I2C3 */ PUA0, 0x00000008, /* Index 0x74: UART0 */ PUA1, 0x00000008, /* Index 0x75: UART1 */ - PI24, 0x00000008, /* Index 0x76: I2C4 */ + + Offset (0x77), PUA4, 0x00000008, /* Index 0x77: UART4 */ PUA2, 0x00000008, /* Index 0x78: UART2 */ PUA3, 0x00000008, /* Index 0x79: UART3 */ @@ -49,6 +52,8 @@ IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) { IORH, 0x00000008, /* Index 0x87: INTH */ Offset (0xE2), + IGSC, 0x00000008, /* Index 0xE0: GEventSci */ + IGSM, 0x00000008, /* Index 0xE1: GEventSmi */ IGPI, 0x00000008, /* Index 0xE2: GPIO */ Offset (0xF0), @@ -58,7 +63,8 @@ IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) { II23, 0x00000008, /* Index 0xF3: I2C3 */ IUA0, 0x00000008, /* Index 0xF4: UART0 */ IUA1, 0x00000008, /* Index 0xF5: UART1 */ - II24, 0x00000008, /* Index 0xF6: I2C4 */ + + Offset (0xF7), IUA4, 0x00000008, /* Index 0xF7: UART4 */ IUA2, 0x00000008, /* Index 0xF8: UART2 */ IUA3, 0x00000008, /* Index 0xF9: UART3 */ |