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authorFred Reitberger <reitbergerfred@gmail.com>2023-01-11 15:12:21 -0500
committerFred Reitberger <reitbergerfred@gmail.com>2023-01-13 20:10:10 +0000
commiteb59493a0666783543a87fefad03bc99674aa4e7 (patch)
tree5b1cc91963b4c53dfdd1a882d92f3aeef68e2951 /src/soc/amd/glinda/Makefile.inc
parent010c408044cefde3fa5b24a25c1ed9f23e3388f5 (diff)
soc/amd/glinda: Use common fsp-s preloader
Use the common preloader for fsp-s Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I32f8ca02c4de9e882f207c2dd2378b6b44dc61ff Reviewed-on: https://review.coreboot.org/c/coreboot/+/71848 Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/glinda/Makefile.inc')
-rw-r--r--src/soc/amd/glinda/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc
index 4d1ba5584d..76c6689681 100644
--- a/src/soc/amd/glinda/Makefile.inc
+++ b/src/soc/amd/glinda/Makefile.inc
@@ -40,7 +40,6 @@ ramstage-y += fsp_s_params.c
ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += mca.c
-ramstage-y += preload.c
ramstage-y += reset.c
ramstage-y += root_complex.c
ramstage-y += uart.c