diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-30 15:15:31 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-01 11:38:10 +0000 |
| commit | 30f36c35e75a1491edfc629766c146707dcb22f5 (patch) | |
| tree | 8dd839a7e2e39b668ef67ef3a147761935bd675a /src/soc/amd/genoa_poc | |
| parent | 5ab978f5ded4a0d964b548d6cb25ac4a9cc7683b (diff) | |
soc/amd: rework DRAM and fixed resource reporting
Introduce read_soc_memmap_resources which gets called by
amd_pci_domain_read_resources for the first domain of the SoC to report
the DRAM and PCI config space access resources to the allocator. For
Genoa this allows to use amd_pci_domain_read_resources as read_resources
in the genoa_pci_domain_ops instead of needing to wrap that call to be
able to call add_opensil_memmap for the first domain. For the other
family 17h+ SoCs the moves the reporting of the DRAM resources and the
PCI config space access resources from the northbridge device to the
domain device.
TEST=Resources still get reported on Mandolin, but now under the domain
instead of the northbridge PCI device
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib19fd94e06fa3a1d95ade7fafe22db013045a942
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80268
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/genoa_poc')
| -rw-r--r-- | src/soc/amd/genoa_poc/domain.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/src/soc/amd/genoa_poc/domain.c b/src/soc/amd/genoa_poc/domain.c index 653e2d2a8c..b34d2e36bb 100644 --- a/src/soc/amd/genoa_poc/domain.c +++ b/src/soc/amd/genoa_poc/domain.c @@ -13,16 +13,9 @@ #define IOHC_IOAPIC_BASE_ADDR_LO 0x2f0 -static void genoa_domain_read_resources(struct device *domain) +void read_soc_memmap_resources(struct device *domain, unsigned long *idx) { - amd_pci_domain_read_resources(domain); - - // We only want to add the DRAM memory map once - if (domain->path.domain.domain == 0) { - /* 0x1000 is a large enough first index to be sure to not overlap with the - resources added by amd_pci_domain_read_resources */ - add_opensil_memmap(domain, 0x1000); - } + *idx = add_opensil_memmap(domain, *idx); } static void genoa_domain_set_resources(struct device *domain) @@ -74,7 +67,7 @@ static const char *genoa_domain_acpi_name(const struct device *domain) } struct device_operations genoa_pci_domain_ops = { - .read_resources = genoa_domain_read_resources, + .read_resources = amd_pci_domain_read_resources, .set_resources = genoa_domain_set_resources, .scan_bus = amd_pci_domain_scan_bus, .init = genoa_domain_init, |