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| author | Jakub Czapiga <jacz@semihalf.com> | 2023-08-31 17:29:16 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-28 13:59:05 +0000 |
| commit | 6f4a9497ae97dcbc3b7cc98a2ce990ecdb797f4e (patch) | |
| tree | 0084580604eb48c93e82107325ff5b6a524b3679 /src/soc/amd/genoa/include | |
| parent | 87d8b8cff0ec36b0cd2a596d1639a90756d91882 (diff) | |
mb/google/rex/var/ovis: Add DPTF configuration
Configure PL1 and PL2 are configured for powerformance.
Based on values from Intel Meteor Lake UH Power Map document ID:640982
BUG=b:286834207
TEST=Build and boot google/ovis and check ACPI SSDT for DPTF entries
Change-Id: Ia40884b3abd1417dea6ad291de4845762ee01966
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77623
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/genoa/include')
0 files changed, 0 insertions, 0 deletions