diff options
| author | vbpandya <pandyavarshit@gmail.com> | 2023-09-22 20:49:37 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-28 13:37:56 +0000 |
| commit | 87d8b8cff0ec36b0cd2a596d1639a90756d91882 (patch) | |
| tree | 4882d833ed5ec06833c2c30df2541c25c2acf945 /src/soc/amd/genoa/chipset.cb | |
| parent | f1bf2d919044902d60b1a36eba16feba4a6c8b3d (diff) | |
soc/amd/genoa: Add chipset.cb
Change-Id: I6c9879a9f06f81d577bc09f6001158d7f9326362
Signed-off-by: vbpandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78082
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/genoa/chipset.cb')
| -rw-r--r-- | src/soc/amd/genoa/chipset.cb | 221 |
1 files changed, 221 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/chipset.cb b/src/soc/amd/genoa/chipset.cb new file mode 100644 index 0000000000..6523617b5b --- /dev/null +++ b/src/soc/amd/genoa/chipset.cb @@ -0,0 +1,221 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip soc/amd/genoa + device cpu_cluster 0 on + end + + device domain 0 on + device pci 00.0 alias gnb_0 on end + device pci 00.2 alias iommu_0 off end + device pci 00.3 alias rcec_0 off end + + device pci 01.0 on end # Dummy Host Bridge, do not disable + device pci 01.1 alias gpp_bridge_0_0_a off end + device pci 01.2 alias gpp_bridge_0_1_a off end + device pci 01.3 alias gpp_bridge_0_2_a off end + device pci 01.4 alias gpp_bridge_0_3_a off end + device pci 01.5 alias gpp_bridge_0_4_a off end + device pci 01.6 alias gpp_bridge_0_5_a off end + device pci 01.7 alias gpp_bridge_0_6_a off end + + device pci 02.0 on end # Dummy Host Bridge, do not disable + device pci 02.1 alias gpp_bridge_0_7_a off end + device pci 02.2 alias gpp_bridge_0_8_a off end + + device pci 03.0 on end # Dummy Host Bridge, do not disable + device pci 03.1 alias gpp_bridge_0_0_b off end + device pci 03.2 alias gpp_bridge_0_1_b off end + device pci 03.3 alias gpp_bridge_0_2_b off end + device pci 03.4 alias gpp_bridge_0_3_b off end + device pci 03.5 alias gpp_bridge_0_4_b off end + device pci 03.6 alias gpp_bridge_0_5_b off end + device pci 03.7 alias gpp_bridge_0_6_b off end + + device pci 04.0 on end # Dummy Host Bridge, do not disable + device pci 04.1 alias gpp_bridge_0_7_b off end + device pci 04.2 alias gpp_bridge_0_8_b off end + + device pci 05.0 on end # Dummy Host Bridge, do not disable + device pci 05.1 alias gpp_bridge_0_0_c off end + device pci 05.2 alias gpp_bridge_0_1_c off end + device pci 05.3 alias gpp_bridge_0_2_c off end + device pci 05.4 alias gpp_bridge_0_3_c off end + + device pci 07.0 on end # Dummy Host Bridge, do not disable + device pci 07.1 alias gpp_bridge_0_a off # Internal GPP Bridge 0 to Bus B0 + device pci 0.0 off end # Dummy PCIe function + device pci 0.1 off end + device pci 0.2 alias primary_NTB_0 off end # Primary PCIe Non-TransparentBridge + device pci 0.3 alias secondry_NTB_0 off end # Secondary vNTB + device pci 0.4 alias xhci_0 off end # USB + device pci 0.5 alias mp0_0 off end # PSP (MP0) + device pci 0.6 alias acp_0 off end # Audio Processor (ACP) + device pci 0.7 alias hda_0 off end # Audio Processor HD Audio Controller (main AZ) + end + device pci 07.2 alias gpp_bridge_0_b off # Internal GPP Bridge 1 to Bus C0 + device pci 0.0 alias sata_0_0 off end # first SATA controller; AHCI mode + device pci 0.1 alias sata_0_1 off end # second SATA controller; AHCI mode + end + + device pci 14.0 alias smbus on end # primary FCH function + device pci 14.3 alias lpc_bridge on end + device pci 14.6 alias sdhci off end + + device pci 18.0 alias data_fabric_0 on end + device pci 18.1 alias data_fabric_1 on end + device pci 18.2 alias data_fabric_2 on end + device pci 18.3 alias data_fabric_3 on end + device pci 18.4 alias data_fabric_4 on end + device pci 18.5 alias data_fabric_5 on end + device pci 18.6 alias data_fabric_6 on end + device pci 18.7 alias data_fabric_7 on end + end + + device domain 1 on + device pci 00.0 alias gnb_1 on end + device pci 00.2 alias iommu_1 off end + device pci 00.3 alias rcec_1 off end + + device pci 01.0 on end # Dummy Host Bridge, do not disable + device pci 01.1 alias gpp_bridge_1_0_a off end + device pci 01.2 alias gpp_bridge_1_1_a off end + device pci 01.3 alias gpp_bridge_1_2_a off end + device pci 01.4 alias gpp_bridge_1_3_a off end + device pci 01.5 alias gpp_bridge_1_4_a off end + device pci 01.6 alias gpp_bridge_1_5_a off end + device pci 01.7 alias gpp_bridge_1_6_a off end + + device pci 02.0 on end # Dummy Host Bridge, do not disable + device pci 02.1 alias gpp_bridge_1_7_a off end + device pci 02.2 alias gpp_bridge_1_8_a off end + + device pci 03.0 on end # Dummy Host Bridge, do not disable + device pci 03.1 alias gpp_bridge_1_0_b off end + device pci 03.2 alias gpp_bridge_1_1_b off end + device pci 03.3 alias gpp_bridge_1_2_b off end + device pci 03.4 alias gpp_bridge_1_3_b off end + device pci 03.5 alias gpp_bridge_1_4_b off end + device pci 03.6 alias gpp_bridge_1_5_b off end + device pci 03.7 alias gpp_bridge_1_6_b off end + + device pci 04.0 on end # Dummy Host Bridge, do not disable + device pci 04.1 alias gpp_bridge_1_7_b off end + device pci 04.2 alias gpp_bridge_1_8_b off end + + device pci 05.0 on end # Dummy Host Bridge, do not disable + + device pci 07.0 on end # Dummy Host Bridge, do not disable + device pci 07.1 alias gpp_bridge_1_a off + device pci 0.0 off end # Dummy PCIe function + device pci 0.1 off end #SDXI + end + end + + device domain 2 on + device pci 00.0 alias gnb_2 on end + device pci 00.2 alias iommu_2 off end + device pci 00.3 alias rcec_2 off end + + device pci 01.0 on end # Dummy Host Bridge, do not disable + device pci 01.1 alias gpp_bridge_2_0_a off end + device pci 01.2 alias gpp_bridge_2_1_a off end + device pci 01.3 alias gpp_bridge_2_2_a off end + device pci 01.4 alias gpp_bridge_2_3_a off end + device pci 01.5 alias gpp_bridge_2_4_a off end + device pci 01.6 alias gpp_bridge_2_5_a off end + device pci 01.7 alias gpp_bridge_2_6_a off end + + device pci 02.0 on end # Dummy Host Bridge, do not disable + device pci 02.1 alias gpp_bridge_2_7_a off end + device pci 02.2 alias gpp_bridge_2_8_a off end + + device pci 03.0 on end # Dummy Host Bridge, do not disable + device pci 03.1 alias gpp_bridge_2_0_b off end + device pci 03.2 alias gpp_bridge_2_1_b off end + device pci 03.3 alias gpp_bridge_2_2_b off end + device pci 03.4 alias gpp_bridge_2_3_b off end + device pci 03.5 alias gpp_bridge_2_4_b off end + device pci 03.6 alias gpp_bridge_2_5_b off end + device pci 03.7 alias gpp_bridge_2_6_b off end + + device pci 04.0 on end # Dummy Host Bridge, do not disable + device pci 04.1 alias gpp_bridge_2_7_b off end + device pci 04.2 alias gpp_bridge_2_8_b off end + + device pci 05.0 on end # Dummy Host Bridge, do not disable + + device pci 07.0 on end # Dummy Host Bridge, do not disable + device pci 07.1 alias gpp_bridge_2_a off + device pci 0.0 off end # Dummy PCIe function + device pci 0.1 off end + end + end + + device domain 3 on + device pci 00.0 alias gnb_3 on end + device pci 00.2 alias iommu_3 off end + device pci 00.3 alias rcec_3 off end + + device pci 01.0 on end # Dummy Host Bridge, do not disable + device pci 01.1 alias gpp_bridge_3_0_a off end + device pci 01.2 alias gpp_bridge_3_1_a off end + device pci 01.3 alias gpp_bridge_3_2_a off end + device pci 01.4 alias gpp_bridge_3_3_a off end + device pci 01.5 alias gpp_bridge_3_4_a off end + device pci 01.6 alias gpp_bridge_3_5_a off end + device pci 01.7 alias gpp_bridge_3_6_a off end + + device pci 02.0 on end # Dummy Host Bridge, do not disable + device pci 02.1 alias gpp_bridge_3_7_a off end + device pci 02.2 alias gpp_bridge_3_8_a off end + + device pci 03.0 on end # Dummy Host Bridge, do not disable + device pci 03.1 alias gpp_bridge_3_0_b off end + device pci 03.2 alias gpp_bridge_3_1_b off end + device pci 03.3 alias gpp_bridge_3_2_b off end + device pci 03.4 alias gpp_bridge_3_3_b off end + device pci 03.5 alias gpp_bridge_3_4_b off end + device pci 03.6 alias gpp_bridge_3_5_b off end + device pci 03.7 alias gpp_bridge_3_6_b off end + + device pci 04.0 on end # Dummy Host Bridge, do not disable + device pci 04.1 alias gpp_bridge_3_7_b off end + device pci 04.2 alias gpp_bridge_3_8_b off end + + device pci 05.0 on end # Dummy Host Bridge, do not disable + device pci 05.1 alias gpp_bridge_3_0_c off end + device pci 05.2 alias gpp_bridge_3_1_c off end + device pci 05.3 alias gpp_bridge_3_2_c off end + device pci 05.4 alias gpp_bridge_3_3_c off end + + device pci 07.0 on end # Dummy Host Bridge, do not disable + device pci 07.1 alias gpp_bridge_3_a off + device pci 0.0 off end # Dummy PCIe function + device pci 0.1 off end #SDXI + device pci 0.2 alias primary_NTB_3 off end # Primary PCIe Non-TransparentBridge + device pci 0.3 alias secondry_NTB_3 off end # Secondary vNTB + device pci 0.4 alias xhci_3 off end # USB + device pci 0.5 alias mp0_3 off end # PSP (MP0) + end + + device pci 07.2 alias gpp_bridge_3b off + device pci 0.0 alias sata_3_0 off end # first SATA controller; AHCI mode + device pci 0.1 alias sata_3_1 off end # second SATA controller; AHCI mode + end + end + + device mmio 0xfedc2000 alias i2c_0 off end + device mmio 0xfedc3000 alias i2c_1 off end + device mmio 0xfedc4000 alias i2c_2 off end + device mmio 0xfedc5000 alias i2c_3 off end + device mmio 0xfedc6000 alias i2c_4 off end + device mmio 0xfedc7000 alias i2c_5 off end + device mmio 0xfedc9000 alias uart_0 off end + device mmio 0xfedca000 alias uart_1 off end + device mmio 0xfedce000 alias uart_2 off end + device mmio 0xfedd2600 alias i3c_0 off end + device mmio 0xfedd3600 alias i3c_1 off end + device mmio 0xfedd4600 alias i3c_2 off end + device mmio 0xfedd5600 alias i3c_3 off end + +end |