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authorFelix Held <felix-coreboot@felixheld.de>2023-10-13 21:19:53 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-10-27 12:34:23 +0000
commit926887ced904faeda461b923761bed441cde0acc (patch)
tree043668dff926cc7caac35f9f091bfc3e8759a2b4 /src/soc/amd/genoa/Makefile.inc
parent0f209b58d2e0d884b4ce9e76e0a769d122e99ac8 (diff)
soc/amd/genoa: add PCI domain resource reporting
Use the common AMD data fabric resource reporting code to report how openSIL distributed PCI buses, MMIO, and IO resources to coreboot's resource allocator. This replaces the original CB:76521 which was written back when the common AMD data fabric resource reporting code didn't exist yet. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: Ifcd655ea6d5565668ffee36d0d022b2b711c0b00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src/soc/amd/genoa/Makefile.inc')
-rw-r--r--src/soc/amd/genoa/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc
index 2877feaccc..de8e2f1ecc 100644
--- a/src/soc/amd/genoa/Makefile.inc
+++ b/src/soc/amd/genoa/Makefile.inc
@@ -14,6 +14,7 @@ romstage-y += romstage.c
ramstage-y += aoac.c
ramstage-y += chip.c
+ramstage-y += domain.c
ramstage-y += root_complex.c
CPPFLAGS_common += -I$(src)/soc/amd/genoa/include