summaryrefslogtreecommitdiff
path: root/src/soc/amd/genoa/Makefile.inc
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2023-07-14 23:05:46 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-11-13 15:16:23 +0000
commit447e27937ca38a9e10a705b0770b71fca7cf4712 (patch)
tree9e9acc5922f613109b323a325da4eb5e5ed87749 /src/soc/amd/genoa/Makefile.inc
parent2e2f1661bb306d7b00b4f121148e9613c5d14e72 (diff)
soc/amd/genoa: Hook up MCA code
This patch uses AMD SoC common code for MCA and adds MCA bank information as per Genoa Processor Programming Reference (PPR) version 0.25 (#55901) and uses AMD SoC common code. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: If728d803d600f7e86507cd1b35b40022bf4d379e Reviewed-on: https://review.coreboot.org/c/coreboot/+/76524 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/genoa/Makefile.inc')
-rw-r--r--src/soc/amd/genoa/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc
index 96acc43b31..33a40611ae 100644
--- a/src/soc/amd/genoa/Makefile.inc
+++ b/src/soc/amd/genoa/Makefile.inc
@@ -18,6 +18,7 @@ ramstage-y += cpu.c
ramstage-y += domain.c
ramstage-y += root_complex.c
ramstage-y += smihandler.c
+ramstage-y += mca.c
smm-y += smihandler.c