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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-12 19:36:55 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-14 13:04:28 +0000 |
| commit | d1065a3e640b6cc13a5901b77604ceb3e57063e0 (patch) | |
| tree | 5eb3fc878b83566aed7d9d7bccda717de2ec0e0d /src/soc/amd/genoa/Kconfig | |
| parent | 3d3e1cf060ccf5701e2ccb0a1698fa804badef90 (diff) | |
soc/amd/genoa: Add basic ACPI support
- DSDT
- MADT
- SSDT CPUs
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0c86694ae83e9e6aa06a50a8a35bf2b24bc8ab65
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76530
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/genoa/Kconfig')
| -rw-r--r-- | src/soc/amd/genoa/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig index 2068c44fdc..6cb4a8a174 100644 --- a/src/soc/amd/genoa/Kconfig +++ b/src/soc/amd/genoa/Kconfig @@ -5,13 +5,16 @@ if SOC_AMD_GENOA config SOC_SPECIFIC_OPTIONS def_bool y + select ACPI_SOC_NVS select ARCH_X86 + select HAVE_ACPI_TABLES select HAVE_EXP_X86_64_SUPPORT select HAVE_SMI_HANDLER select RESET_VECTOR_IN_RAM select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK_ACPI select SOC_AMD_COMMON_BLOCK_ACPIMMIO + select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE select SOC_AMD_COMMON_BLOCK_AOAC select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H @@ -32,6 +35,7 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_SMM select SOC_AMD_COMMON_BLOCK_SMU select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY + select SOC_AMD_COMMON_BLOCK_SVI3 select SOC_AMD_COMMON_BLOCK_TSC select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UCODE @@ -179,4 +183,12 @@ config HEAP_SIZE hex default 0x200000 +config ACPI_SSDT_PSD_INDEPENDENT + bool "Allow core p-state independent transitions" + default y + help + AMD recommends the ACPI _PSD object to be configured to cause + cores to transition between p-states independently. A vendor may + choose to generate _PSD object to allow cores to transition together. + endif # SOC_AMD_GENOA |