diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-03 18:52:36 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-04 17:51:26 +0000 |
| commit | c32df9aa1659f404635bbb7b6421444c4b2e1e47 (patch) | |
| tree | 1e9312a62a1f571e5ed89d55da15eea510d0cc66 /src/soc/amd/common | |
| parent | e54e141d6c90f995f3917dca9224ea4619ea4bec (diff) | |
soc/amd/common/block/acpi/ivrs: use IOMMU PCI register definitions
Use IOMMU_CAP_BASE_[LO,HI] instead of magic values.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I7032d9f032a22649951ef1535f39b918eb8bd539
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/acpi/ivrs.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c index ae39775482..17356901f6 100644 --- a/src/soc/amd/common/block/acpi/ivrs.c +++ b/src/soc/amd/common/block/acpi/ivrs.c @@ -5,6 +5,7 @@ #include <amdblocks/cpu.h> #include <amdblocks/data_fabric.h> #include <amdblocks/ioapic.h> +#include <amdblocks/iommu.h> #include <arch/ioapic.h> #include <console/console.h> #include <cpu/amd/cpuid.h> @@ -339,8 +340,8 @@ unsigned long acpi_fill_ivrs(acpi_ivrs_t *ivrs, unsigned long current) /* BDF <bus>:00.2 */ ivhd->device_id = 0x02 | (nb_dev->bus->secondary << 8); ivhd->capability_offset = pci_find_capability(iommu_dev, IOMMU_CAP_ID); - ivhd->iommu_base_low = pci_read_config32(iommu_dev, 0x44) & 0xffffc000; - ivhd->iommu_base_high = pci_read_config32(iommu_dev, 0x48); + ivhd->iommu_base_low = pci_read_config32(iommu_dev, IOMMU_CAP_BASE_LO) & 0xffffc000; + ivhd->iommu_base_high = pci_read_config32(iommu_dev, IOMMU_CAP_BASE_HI); cap_offset_0 = pci_read_config32(iommu_dev, ivhd->capability_offset); cap_offset_10 = pci_read_config32(iommu_dev, |