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authorKyösti Mälkki <kyosti.malkki@gmail.com>2022-05-26 15:42:59 +0300
committerFelix Held <felix-coreboot@felixheld.de>2022-06-28 14:53:32 +0000
commit8b894242e727539ed40436d20bd87a097d371845 (patch)
tree96c8a515b8dbc26aeaa54fc38d175343950ecc51 /src/soc/amd/common
parent933a44b80d3b414282fe0c7b060cb7fd0dc6cf90 (diff)
soc,sb/amd: Change SPI controller resource
This replaces IORESOURCE_SUBTRACTIVE with IORESOURCE_RESERVE. Change-Id: Ib3d934ca704273daacbeb3c52412bf04e2be7217 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64695 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r--src/soc/amd/common/block/lpc/lpc.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index 0eda7f2fd8..68e1fce960 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -117,8 +117,7 @@ static void lpc_read_resources(struct device *dev)
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
/* Add a memory resource for the SPI BAR. */
- fixed_mem_resource_kb(dev, 2, SPI_BASE_ADDRESS / KiB, 1,
- IORESOURCE_SUBTRACTIVE);
+ mmio_range(dev, 2, SPI_BASE_ADDRESS, 1 * KiB);
res = new_resource(dev, 3); /* IOAPIC */
res->base = IO_APIC_ADDR;