diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-05-07 08:37:31 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-13 21:20:32 +0000 |
| commit | 669ba237100da680fb56950feab2b6591218e184 (patch) | |
| tree | dad9f6ff0432f2ffc8d5958aa96c605d18d62d82 /src/soc/amd/common | |
| parent | 7a2a29d0e1f2ef48a2f90c190a8135da204f4d15 (diff) | |
vc/amd/00670F00: Sync AGESA.h with PI blob
Add a new callout definition for AgesaGetTempHeapBase and displace
AgesaHeapRebase (which was merged too soon) in the ordering. Also
add its structure.
AGESA will be modified to ask coreboot for the location for temporary
storage of heap data at the end of InitPost. The old methodology is
to use 0xb0000 but the change will allow coreboot to determine the
location.
BUG=b:74518368
Change-Id: I0bc894d7842cf4b3eb728a90704277b17f4bf7be
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/26145
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common')
0 files changed, 0 insertions, 0 deletions