diff options
author | Martin Roth <martinroth@google.com> | 2017-10-02 13:46:50 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-10-20 17:48:37 +0000 |
commit | c450fbe909e7ed1bc8309ace60ad45fc65a208e1 (patch) | |
tree | 0cc2ab84880902aa015517776b43c0fa5bec7368 /src/soc/amd/common | |
parent | 44aaf6137d0e000d6a83ca036aad5722b485d716 (diff) |
Stoney Ridge Platforms: Make AGESA callout tables common
There was no reason to have the AGESA callout tables in each mainboard,
so move them to soc/amd/common.
Move chip specific functions into the stoneyridge directory:
- agesa_fch_initreset
- agesa_fch_initenv
- agesa_ReadSpd
Combine agesa_ReadSpd and agesa_ReadSpd_from_cbfs, and figure out which
to use.
Soldered-down memory still needs to be supported in a future commit, as
stoney supports both DDR3 & DDR4. A bug has been filed for support for
the upcoming Grunt platform.
BUG=b:67209686
TEST=Build and boot on Kahlee
Change-Id: Ife9bd90be9eb0ce0a7ce41d75cfef979b11e640b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r-- | src/soc/amd/common/BiosCallOuts.h | 9 | ||||
-rw-r--r-- | src/soc/amd/common/def_callouts.c | 75 |
2 files changed, 49 insertions, 35 deletions
diff --git a/src/soc/amd/common/BiosCallOuts.h b/src/soc/amd/common/BiosCallOuts.h index c2c5556dfa..ef853fa52b 100644 --- a/src/soc/amd/common/BiosCallOuts.h +++ b/src/soc/amd/common/BiosCallOuts.h @@ -19,6 +19,7 @@ #include <Porting.h> #include <AGESA.h> +#include <FchPlatform.h> #define BIOS_HEAP_START_ADDRESS 0x010000000 #define BIOS_HEAP_SIZE 0x30000 @@ -48,8 +49,6 @@ AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt); AGESA_STATUS agesa_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr); -AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, - VOID *ConfigPtr); AGESA_STATUS agesa_RunFcnOnAllAps(UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_LateRunApTask(UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS agesa_PcieSlotResetControl(UINT32 Func, UINTN Data, @@ -60,6 +59,12 @@ AGESA_STATUS agesa_IdleAnAp(UINT32 Func, UINTN Data, VOID *ConfigPtr); AGESA_STATUS GetBiosCallout(UINT32 Func, UINTN Data, VOID *ConfigPtr); +AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr); +AGESA_STATUS agesa_fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr); + +void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset); +void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env); +void oem_fan_control(FCH_DATA_BLOCK *FchParams); typedef struct { UINT32 CalloutName; CALLOUT_ENTRY CalloutPtr; diff --git a/src/soc/amd/common/def_callouts.c b/src/soc/amd/common/def_callouts.c index aa35e345b5..6e46f69ec0 100644 --- a/src/soc/amd/common/def_callouts.c +++ b/src/soc/amd/common/def_callouts.c @@ -15,16 +15,56 @@ */ #include <cbfs.h> -#include <spd_bin.h> #include <AGESA.h> #include <amdlib.h> #include <Ids.h> #include <agesawrapper.h> #include <BiosCallOuts.h> -#include <dimmSpd.h> #include <soc/southbridge.h> +#if ENV_BOOTBLOCK +const BIOS_CALLOUT_STRUCT BiosCallouts[] = { + { AGESA_DO_RESET, agesa_Reset }, + { AGESA_FCH_OEM_CALLOUT, agesa_fch_initreset }, + { AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl } +}; +#else +const BIOS_CALLOUT_STRUCT BiosCallouts[] = { + /* Required callouts */ + { AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer }, + { AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer }, + { AGESA_DO_RESET, agesa_Reset }, + { AGESA_LOCATE_BUFFER, agesa_LocateBuffer }, + { AGESA_READ_SPD, agesa_ReadSpd }, + { AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, + { AGESA_RUNFUNC_ON_ALL_APS, agesa_RunFcnOnAllAps }, + { AMD_LATE_RUN_AP_TASK, agesa_LateRunApTask }, + { AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl }, + { AGESA_WAIT_FOR_ALL_APS, agesa_WaitForAllApsFinished }, + { AGESA_IDLE_AN_AP, agesa_IdleAnAp }, + + /* Optional callouts */ + { AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, + //AgesaHeapRebase - Hook ID? + { AGESA_HOOKBEFORE_DRAM_INIT, agesa_NoopUnsupported }, + { AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopUnsupported }, + { AGESA_EXTERNAL_2D_TRAIN_VREF_CHANGE, agesa_NoopUnsupported }, + { AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopUnsupported }, + { AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }, + { AGESA_FCH_OEM_CALLOUT, agesa_fch_initenv }, + { AGESA_EXTERNAL_VOLTAGE_ADJUST, agesa_NoopUnsupported }, + { AGESA_GNB_PCIE_CLK_REQ, agesa_NoopUnsupported }, + + /* Deprecated */ + { AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopUnsupported}, + { AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, + +}; +#endif + +const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); + AGESA_STATUS GetBiosCallout(UINT32 Func, UINTN Data, VOID *ConfigPtr) { UINTN i; @@ -115,37 +155,6 @@ AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, return pVbiosImageInfo->ImagePtr ? AGESA_SUCCESS : AGESA_WARNING; } -AGESA_STATUS agesa_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr) -{ - AGESA_STATUS Status = AGESA_UNSUPPORTED; -#ifdef __PRE_RAM__ - Status = AmdMemoryReadSPD(Func, Data, ConfigPtr); -#endif - return Status; -} - -AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr) -{ - AGESA_STATUS Status = AGESA_UNSUPPORTED; - -#ifdef __PRE_RAM__ - AGESA_READ_SPD_PARAMS *info = ConfigPtr; - if (info->MemChannelId > 0) - return AGESA_UNSUPPORTED; - if (info->SocketId != 0) - return AGESA_UNSUPPORTED; - if (info->DimmId != 0) - return AGESA_UNSUPPORTED; - - /* Read index 0, first SPD_SIZE bytes of spd.bin file. */ - if (read_ddr3_spd_from_cbfs((u8 *)info->Buffer, 0) < 0) - die("No SPD data\n"); - - Status = AGESA_SUCCESS; -#endif - return Status; -} - AGESA_STATUS agesa_RunFcnOnAllAps(UINT32 Func, UINTN Data, VOID *ConfigPtr) { printk(BIOS_WARNING, "Warning - Missing AGESA callout: %s\n", __func__); |