diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-26 16:42:46 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-27 16:00:53 +0000 |
commit | 6b248a2da381928a5670aa1e50e7c9e790749c51 (patch) | |
tree | 65d2e74552fcc87de99367ab94e3a3962c7dc17e /src/soc/amd/common | |
parent | aebf534364de1e7dc449920bc25fe2123cf4dd75 (diff) |
soc/amd/common/fsp: factor out read_fsp_resources from root_complex.c
Factor out the common FSP-specific code to report the usable and
reserved memory resources read from the HOBs that FSP has put into
memory. This both reduces code duplication and also moves FSP-specific
code out of the SoC code into the FSP-specific common AMD SoC code
folder.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib373c52030209235559c9cd383f48ee1b3f8f79b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76759
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/root_complex.h | 2 | ||||
-rw-r--r-- | src/soc/amd/common/fsp/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/common/fsp/fsp_report_resources.c | 35 |
3 files changed, 38 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/root_complex.h b/src/soc/amd/common/block/include/amdblocks/root_complex.h index 6149897b1e..fd75ddffa3 100644 --- a/src/soc/amd/common/block/include/amdblocks/root_complex.h +++ b/src/soc/amd/common/block/include/amdblocks/root_complex.h @@ -22,4 +22,6 @@ void read_non_pci_resources(struct device *domain, unsigned int *idx); uint32_t get_iohc_misc_smn_base(struct device *domain); const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count); +void read_fsp_resources(struct device *dev, unsigned int *idx); + #endif /* AMD_BLOCK_ROOT_COMPLEX_H */ diff --git a/src/soc/amd/common/fsp/Makefile.inc b/src/soc/amd/common/fsp/Makefile.inc index ab9a7ab507..cb4b675975 100644 --- a/src/soc/amd/common/fsp/Makefile.inc +++ b/src/soc/amd/common/fsp/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y) romstage-y += fsp_reset.c romstage-y += fsp_validate.c +ramstage-y += fsp_report_resources.c ramstage-y += fsp_reset.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fsp-acpi.c ramstage-$(CONFIG_SOC_AMD_COMMON_FSP_CCX_CPPC_HOB) += fsp_ccx_cppc_hob.c diff --git a/src/soc/amd/common/fsp/fsp_report_resources.c b/src/soc/amd/common/fsp/fsp_report_resources.c new file mode 100644 index 0000000000..bcc0715982 --- /dev/null +++ b/src/soc/amd/common/fsp/fsp_report_resources.c @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/root_complex.h> +#include <cbmem.h> +#include <console/console.h> +#include <device/device.h> +#include <fsp/util.h> +#include <types.h> + +void read_fsp_resources(struct device *dev, unsigned int *idx) +{ + const uint32_t mem_usable = (uintptr_t)cbmem_top(); + const struct hob_header *hob_iterator; + const struct hob_resource *res; + + if (fsp_hob_iterator_init(&hob_iterator) != CB_SUCCESS) { + printk(BIOS_ERR, "%s incomplete because no HOB list was found\n", __func__); + return; + } + + while (fsp_hob_iterator_get_next_resource(&hob_iterator, &res) == CB_SUCCESS) { + if (res->type == EFI_RESOURCE_SYSTEM_MEMORY && res->addr < mem_usable) + /* 0 through low usable is already reported by the root complex code */ + continue; + if (res->type == EFI_RESOURCE_MEMORY_MAPPED_IO) + continue; /* Done separately */ + + if (res->type == EFI_RESOURCE_SYSTEM_MEMORY) + ram_range(dev, (*idx)++, res->addr, res->length); + else if (res->type == EFI_RESOURCE_MEMORY_RESERVED) + reserved_ram_range(dev, (*idx)++, res->addr, res->length); + else + printk(BIOS_ERR, "failed to set resources for type %d\n", res->type); + } +} |