diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-06-02 15:51:49 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-11 15:15:27 +0000 |
| commit | 0c5885cd94ad8135c0187e5038c0690eb3550047 (patch) | |
| tree | 414c681d6c8ff556d7ed08cac7425d0a095bbaaf /src/soc/amd/common | |
| parent | 3d91b47b425ffb880c0ed6c45fd04ba48d95ca8d (diff) | |
soc/amd/common/include/lpc: add definitions for LPC LDRQ control bits
The definitions of bit 9 and 10 somehow got swapped between Picasso and
Renoir/Cezanne, so put those in the Cezanne-specific header file. The
reference code writes the same values to the raw bits in both, so we
probably would still get away with putting this into the common header,
but it's better to keep the defines consistent with the documentation in
all cases.
Register and bit definitions are from the Cezanne PPR #56569 Rev 3.03
and cross-checked to be compatible with the Picasso PPR #55570 Rev 3.16.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3a033d63eeb06eed6783e4c3797ad8dea490db8d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/lpc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/lpc.h b/src/soc/amd/common/block/include/amdblocks/lpc.h index aa483e4df7..daa51f1145 100644 --- a/src/soc/amd/common/block/include/amdblocks/lpc.h +++ b/src/soc/amd/common/block/include/amdblocks/lpc.h @@ -105,6 +105,8 @@ #define LPC_ALT_WIDEIO0_ENABLE BIT(0) #define LPC_MISC_CONTROL_BITS 0x78 +#define LPC_LDRQ1_EN BIT(3) +#define LPC_LDRQ0_EN BIT(2) #define LPC_NOHOG BIT(0) #define LPC_TRUSTED_PLATFORM_MODULE 0x7c |