soc/amd/common: Drop ACPIMMIO GPIO bank separation

It's assumed in ASL already that the banks appear one
after other in ACPIMMIO space. There is no need for
the separation of accessor functions by name.

Change-Id: I4c8c3f2028ca89dca5c7f0548fcd18e1045999d6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

2 files changed, 0 insertions, 97 deletions

diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c
index 9e8342b6f8..1cacd44433 100644
--- a/src/soc/amd/common/block/acpimmio/mmio_util.c
+++ b/src/soc/amd/common/block/acpimmio/mmio_util.c
@@ -35,8 +35,6 @@ DECLARE_ACPIMMIO(acpimmio_smbus, SMBUS);
 DECLARE_ACPIMMIO(acpimmio_wdt, WDT);
 DECLARE_ACPIMMIO(acpimmio_hpet, HPET);
 DECLARE_ACPIMMIO(acpimmio_dpvga, DPVGA);
-DECLARE_ACPIMMIO(acpimmio_gpio1, GPIO1);
-DECLARE_ACPIMMIO(acpimmio_gpio2, GPIO2);
 DECLARE_ACPIMMIO(acpimmio_xhci_pm, XHCIPM);
 DECLARE_ACPIMMIO(acpimmio_acdc_tmr, ACDCTMR);
 #endif
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 8443d298df..ca32f2399e 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -61,8 +61,6 @@ extern uint8_t *MAYBE_CONST acpimmio_iomux;
 extern uint8_t *MAYBE_CONST acpimmio_misc;
 extern uint8_t *MAYBE_CONST acpimmio_dpvga;
 extern uint8_t *MAYBE_CONST acpimmio_gpio0;
-extern uint8_t *MAYBE_CONST acpimmio_gpio1;
-extern uint8_t *MAYBE_CONST acpimmio_gpio2;
 extern uint8_t *MAYBE_CONST acpimmio_xhci_pm;
 extern uint8_t *MAYBE_CONST acpimmio_acdc_tmr;
 extern uint8_t *MAYBE_CONST acpimmio_aoac;
@@ -349,99 +347,6 @@ static inline void gpio_write32(uint8_t gpio_num, uint32_t value)
 	write32(gpio_ctrl_ptr(gpio_num), value);
 }
 
-/* GPIO bank 0 */
-static inline uint8_t gpio0_read8(uint8_t reg)
-{
-	return read8(acpimmio_gpio0 + reg);
-}
-
-static inline uint16_t gpio0_read16(uint8_t reg)
-{
-	return read16(acpimmio_gpio0 + reg);
-}
-
-static inline uint32_t gpio0_read32(uint8_t reg)
-{
-	return read32(acpimmio_gpio0 + reg);
-}
-
-static inline void gpio0_write8(uint8_t reg, uint8_t value)
-{
-	write8(acpimmio_gpio0 + reg, value);
-}
-
-static inline void gpio0_write16(uint8_t reg, uint16_t value)
-{
-	write16(acpimmio_gpio0 + reg, value);
-}
-
-static inline void gpio0_write32(uint8_t reg, uint32_t value)
-{
-	write32(acpimmio_gpio0 + reg, value);
-}
-
-/* GPIO bank 1 */
-static inline uint8_t gpio1_read8(uint8_t reg)
-{
-	return read8(acpimmio_gpio1 + reg);
-}
-
-static inline uint16_t gpio1_read16(uint8_t reg)
-{
-	return read16(acpimmio_gpio1 + reg);
-}
-
-static inline uint32_t gpio1_read32(uint8_t reg)
-{
-	return read32(acpimmio_gpio1 + reg);
-}
-
-static inline void gpio1_write8(uint8_t reg, uint8_t value)
-{
-	write8(acpimmio_gpio1 + reg, value);
-}
-
-static inline void gpio1_write16(uint8_t reg, uint16_t value)
-{
-	write16(acpimmio_gpio1 + reg, value);
-}
-
-static inline void gpio1_write32(uint8_t reg, uint32_t value)
-{
-	write32(acpimmio_gpio1 + reg, value);
-}
-
-/* GPIO bank 2 */
-static inline uint8_t gpio2_read8(uint8_t reg)
-{
-	return read8(acpimmio_gpio2 + reg);
-}
-
-static inline uint16_t gpio2_read16(uint8_t reg)
-{
-	return read16(acpimmio_gpio2 + reg);
-}
-
-static inline uint32_t gpio2_read32(uint8_t reg)
-{
-	return read32(acpimmio_gpio2 + reg);
-}
-
-static inline void gpio2_write8(uint8_t reg, uint8_t value)
-{
-	write8(acpimmio_gpio2 + reg, value);
-}
-
-static inline void gpio2_write16(uint8_t reg, uint16_t value)
-{
-	write16(acpimmio_gpio2 + reg, value);
-}
-
-static inline void gpio2_write32(uint8_t reg, uint32_t value)
-{
-	write32(acpimmio_gpio2 + reg, value);
-}
-
 static inline uint8_t xhci_pm_read8(uint8_t reg)
 {
 	return read8(acpimmio_xhci_pm + reg);