diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-01 00:34:11 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-02 21:27:21 +0000 |
| commit | 875e5aa96c8d9e767d24b99015abb66bf7e0ef75 (patch) | |
| tree | 4499acee68d6d7c43d5603650dd34ea4b4e12b15 /src/soc/amd/common | |
| parent | 6443ad4a53ab65a2a9c1d29f422644e450c04cd7 (diff) | |
soc/amd: factor out SMBUS controller registers into common header
The patch also rewrites the bit definition using shifts to make them
easier to read.
The older non-SoC chips can probably also use the new header file, but
for this patch the scope is limited to soc/amd, since the older non-SoC
chips don't use the SMBUS controller code in soc/amd/common.
TEST=Timeless build for amd/mandolin and amd/gardenia doesn't change.
Change-Id: Ifd5e7e64a41f1cb20cdc4d6ad1e675d7f2de352b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/smbus.h | 50 | ||||
| -rw-r--r-- | src/soc/amd/common/block/smbus/smbus.c | 2 |
2 files changed, 51 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/smbus.h b/src/soc/amd/common/block/include/amdblocks/smbus.h new file mode 100644 index 0000000000..b618b78c34 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/smbus.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef AMD_BLOCK_SMBUS_H +#define AMD_BLOCK_SMBUS_H + +/* SMBUS MMIO offsets 0xfed80a00 */ +#define SMBHSTSTAT 0x0 +#define SMBHST_STAT_FAILED (1 << 4) +#define SMBHST_STAT_COLLISION (1 << 3) +#define SMBHST_STAT_ERROR (1 << 2) +#define SMBHST_STAT_INTERRUPT (1 << 1) +#define SMBHST_STAT_BUSY (1 << 0) +#define SMBHST_STAT_CLEAR 0xff +#define SMBHST_STAT_NOERROR (1 << 1) /* TODO: this one looks odd */ +#define SMBHST_STAT_VAL_BITS 0x1f +#define SMBHST_STAT_ERROR_BITS 0x1c + +#define SMBSLVSTAT 0x1 +#define SMBSLV_STAT_ALERT (1 << 5) +#define SMBSLV_STAT_SHADOW2 (1 << 4) +#define SMBSLV_STAT_SHADOW1 (1 << 3) +#define SMBSLV_STAT_SLV_STS (1 << 2) +#define SMBSLV_STAT_SLV_INIT (1 << 1) +#define SMBSLV_STAT_SLV_BUSY (1 << 0) +#define SMBSLV_STAT_CLEAR 0x1f + +#define SMBHSTCTRL 0x2 +#define SMBHST_CTRL_RST (1 << 7) +#define SMBHST_CTRL_STRT (1 << 6) +#define SMBHST_CTRL_QCK_RW (0x0 << 2) +#define SMBHST_CTRL_BTE_RW (0x1 << 2) +#define SMBHST_CTRL_BDT_RW (0x2 << 2) +#define SMBHST_CTRL_WDT_RW (0x3 << 2) +#define SMBHST_CTRL_BLK_RW (0x5 << 2) +#define SMBHST_CTRL_MODE_BITS (0x7 << 2) +#define SMBHST_CTRL_KILL (1 << 1) +#define SMBHST_CTRL_IEN (1 << 0) + +#define SMBHSTCMD 0x3 +#define SMBHSTADDR 0x4 +#define SMBHSTDAT0 0x5 +#define SMBHSTDAT1 0x6 +#define SMBHSTBLKDAT 0x7 +#define SMBSLVCTRL 0x8 +#define SMBSLVCMD_SHADOW 0x9 +#define SMBSLVEVT 0xa +#define SMBSLVDAT 0xc +#define SMBTIMING 0xe + +#endif /* AMD_BLOCK_SMBUS_H */ diff --git a/src/soc/amd/common/block/smbus/smbus.c b/src/soc/amd/common/block/smbus/smbus.c index e30448312d..e94adf5bc6 100644 --- a/src/soc/amd/common/block/smbus/smbus.c +++ b/src/soc/amd/common/block/smbus/smbus.c @@ -5,7 +5,7 @@ #include <device/smbus_host.h> #include <amdblocks/acpimmio.h> #include <amdblocks/acpimmio_map.h> -#include <soc/southbridge.h> +#include <amdblocks/smbus.h> /* * Between 1-10 seconds, We should never timeout normally |