soc/amd/common/data_fabric/domain: introduce add_pci_cfg_resources

Since reporting the PCI ECAM MMCONF MMIO region and the IO ports for the
legacy PCI config space access is needed on all AMD SoCs, implement a
common add_pci_cfg_resources function that reports both and gets called
from amd_pci_domain_read_resources and don't report those in the SoC-
specific code any more. The only functional change is that on Genoa now
the IO ports used for the legacy PCI config space access get reserved.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibbcc2aea4f25b6dc68fdf7f360e5a4ce53f6d850
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 8 insertions, 0 deletions

diff --git a/src/soc/amd/common/block/data_fabric/domain.c b/src/soc/amd/common/block/data_fabric/domain.c
index 65735574d1..f5d7216c04 100644
--- a/src/soc/amd/common/block/data_fabric/domain.c
+++ b/src/soc/amd/common/block/data_fabric/domain.c
@@ -191,6 +191,12 @@ static void add_data_fabric_io_regions(struct device *domain, unsigned long *idx
 	}
 }
 
+static void add_pci_cfg_resources(struct device *domain, unsigned long *idx)
+{
+	fixed_io_range_reserved(domain, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+	mmconf_resource(domain, (*idx)++);
+}
+
 void amd_pci_domain_read_resources(struct device *domain)
 {
 	unsigned long idx = 0;
@@ -203,6 +209,8 @@ void amd_pci_domain_read_resources(struct device *domain)
 
 	/* Only add the SoC's DRAM memory map and fixed resources once */
 	if (domain->path.domain.domain == 0) {
+		add_pci_cfg_resources(domain, &idx);
+
 		read_soc_memmap_resources(domain, &idx);
 	}
 }