summaryrefslogtreecommitdiff
path: root/src/soc/amd/common/block
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2020-08-10 20:30:36 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-08-11 19:08:43 +0000
commitf08fbf882a1517676c4b91f4c755b97a9125c6b2 (patch)
treef4ede37cc593b717a15a9ac49995c7b51d1fb56f /src/soc/amd/common/block
parent92dd678d6a89fac4afa199202ea1db97e620ba2b (diff)
soc/amd/common/espi_util: make decode enable parameter uint32_t
Since this is a bit mask applied to the raw value of a 32 bit register, this should be a 32 bit unsigned type. Change-Id: I9d9930963d8c827a84dc1f67e2f2fa8f95ab40f2 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/common/block')
-rw-r--r--src/soc/amd/common/block/lpc/espi_util.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c
index ae5edb6592..ba633a9a6c 100644
--- a/src/soc/amd/common/block/lpc/espi_util.c
+++ b/src/soc/amd/common/block/lpc/espi_util.c
@@ -54,7 +54,7 @@ static void espi_write8(unsigned int reg, uint8_t val)
write8((void *)(espi_get_bar() + reg), val);
}
-static void espi_enable_decode(int decode_en)
+static void espi_enable_decode(uint32_t decode_en)
{
uint32_t val;
@@ -63,7 +63,7 @@ static void espi_enable_decode(int decode_en)
espi_write32(ESPI_DECODE, val);
}
-static bool espi_is_decode_enabled(int decode)
+static bool espi_is_decode_enabled(uint32_t decode)
{
uint32_t val;