diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/soc/amd/common/block | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/pi/refcode_loader.c | 12 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/psp.c | 2 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/amd/common/block/pi/refcode_loader.c b/src/soc/amd/common/block/pi/refcode_loader.c index 7937817316..47402b670b 100644 --- a/src/soc/amd/common/block/pi/refcode_loader.c +++ b/src/soc/amd/common/block/pi/refcode_loader.c @@ -60,7 +60,7 @@ static int agesa_locate_stage_file_ramstage(const char *name, .prog = &prog, }; - if (acpi_is_wakeup_s3() && !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) { + if (acpi_is_wakeup_s3() && !CONFIG(NO_STAGE_CACHE)) { printk(BIOS_INFO, "AGESA: Loading stage from cache\n"); // There is no way to tell if this succeeded. stage_cache_load_stage(STAGE_REFCODE, &prog); @@ -71,7 +71,7 @@ static int agesa_locate_stage_file_ramstage(const char *name, if (rmodule_stage_load(&rmod_agesa) < 0) return -1; - if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE)) { + if (!CONFIG(NO_STAGE_CACHE)) { printk(BIOS_INFO, "AGESA: Saving stage to cache\n"); stage_cache_add(STAGE_REFCODE, &prog); } @@ -83,14 +83,14 @@ static int agesa_locate_stage_file_ramstage(const char *name, static int agesa_locate_stage_file(const char *name, struct region_device *rdev) { - if (!ENV_RAMSTAGE || !IS_ENABLED(CONFIG_AGESA_SPLIT_MEMORY_FILES)) + if (!ENV_RAMSTAGE || !CONFIG(AGESA_SPLIT_MEMORY_FILES)) return agesa_locate_stage_file_early(name, rdev); return agesa_locate_stage_file_ramstage(name, rdev); } static const char *get_agesa_cbfs_name(void) { - if (!IS_ENABLED(CONFIG_AGESA_SPLIT_MEMORY_FILES)) + if (!CONFIG(AGESA_SPLIT_MEMORY_FILES)) return CONFIG_AGESA_CBFS_NAME; if (!ENV_RAMSTAGE) return CONFIG_AGESA_PRE_MEMORY_CBFS_NAME; @@ -108,7 +108,7 @@ const void *agesawrapper_locate_module(const char name[8]) fname = get_agesa_cbfs_name(); - if (IS_ENABLED(CONFIG_AGESA_BINARY_PI_AS_STAGE)) + if (CONFIG(AGESA_BINARY_PI_AS_STAGE)) ret = agesa_locate_stage_file(fname, &rdev); else ret = agesa_locate_raw_file(fname, &rdev); @@ -119,7 +119,7 @@ const void *agesawrapper_locate_module(const char name[8]) file_size = region_device_sz(&rdev); /* Assume boot device is memory mapped so the mapping can leak. */ - assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED)); agesa = rdev_mmap_full(&rdev); diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c index 8bc0f3663b..723b279aa3 100644 --- a/src/soc/amd/common/block/psp/psp.c +++ b/src/soc/amd/common/block/psp/psp.c @@ -290,7 +290,7 @@ static int psp_load_blob(int type, void *addr) { int cmd_status; - if (!IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW)) { + if (!CONFIG(SOC_AMD_PSP_SELECTABLE_SMU_FW)) { printk(BIOS_ERR, "BUG: Selectable firmware is not supported\n"); return PSPSTS_UNSUPPORTED; } |