diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-11 04:57:50 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-12 14:39:09 +0000 |
| commit | ec54445cd4f2ac2337091e7201680ba38b988cd0 (patch) | |
| tree | 5504c0d39ec7d15be6989688a2b22295b33a16d3 /src/soc/amd/common/block | |
| parent | 007cf382f887b11239aff88ed469ffbdd10bd701 (diff) | |
soc/amd/picasso/psp: move to common code and rename to psp_smm_gen2
Change-Id: I771a7d36eea7307754386824190624a09c0e38f7
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/psp/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/psp_smm_gen2.c | 43 |
2 files changed, 44 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc index 907f0ef147..3bb03f7e81 100644 --- a/src/soc/amd/common/block/psp/Makefile.inc +++ b/src/soc/amd/common/block/psp/Makefile.inc @@ -20,5 +20,6 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2),y) romstage-y += psp_gen2.c ramstage-y += psp_gen2.c smm-y += psp_gen2.c +smm-y += psp_smm_gen2.c endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2 diff --git a/src/soc/amd/common/block/psp/psp_smm_gen2.c b/src/soc/amd/common/block/psp/psp_smm_gen2.c new file mode 100644 index 0000000000..f02723ad1f --- /dev/null +++ b/src/soc/amd/common/block/psp/psp_smm_gen2.c @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/smi.h> +#include <amdblocks/acpimmio.h> +#include <amdblocks/psp.h> +#include <amdblocks/smi.h> + +void soc_fill_smm_trig_info(struct smm_trigger_info *trig) +{ + if (!trig) + return; + + trig->address = (uintptr_t)acpimmio_smi + SMI_REG_SMITRIG0; + trig->address_type = SMM_TRIGGER_MEM; + trig->value_width = SMM_TRIGGER_DWORD; + trig->value_and_mask = ~SMITRIG0_PSP; + trig->value_or_mask = SMITRIG0_PSP; +} + +void soc_fill_smm_reg_info(struct smm_register_info *reg) +{ + if (!reg) + return; + + reg->smi_enb.address = (uintptr_t)acpimmio_smi + SMI_REG_SMITRIG0; + reg->smi_enb.address_type = SMM_TRIGGER_MEM; + reg->smi_enb.value_width = SMM_TRIGGER_DWORD; + reg->smi_enb.reg_bit_mask = SMITRG0_SMIENB; + reg->smi_enb.expect_value = 0; + + reg->eos.address = (uintptr_t)acpimmio_smi + SMI_REG_SMITRIG0; + reg->eos.address_type = SMM_TRIGGER_MEM; + reg->eos.value_width = SMM_TRIGGER_DWORD; + reg->eos.reg_bit_mask = SMITRG0_EOS; + reg->eos.expect_value = SMITRG0_EOS; + + reg->psp_smi_en.address = (uintptr_t)acpimmio_smi + SMI_REG_CONTROL0; + reg->psp_smi_en.address += sizeof(uint32_t) * SMITYPE_PSP / 16; + reg->psp_smi_en.address_type = SMM_TRIGGER_MEM; + reg->psp_smi_en.value_width = SMM_TRIGGER_DWORD; + reg->psp_smi_en.reg_bit_mask = SMI_MODE_MASK << (2 * SMITYPE_PSP % 16); + reg->psp_smi_en.expect_value = SMI_MODE_SMI << (2 * SMITYPE_PSP % 16); +} |