soc/amd/common: Allow runtime mapping of ACPIMMIO banks

Future implementation of verstage running on PSP will have access
to some of the ACPIMMIO banks, but banks will be mapped runtime
at non-deterministic addresses. Provide preprocessor helpers to
accomplish this.

Change-Id: I8d50de60bb1ea1b3a521ab535a5637c4de8c3559
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42073
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>

3 files changed, 67 insertions, 47 deletions

diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c
index b3d3332ea4..508467297c 100644
--- a/src/soc/amd/common/block/acpimmio/mmio_util.c
+++ b/src/soc/amd/common/block/acpimmio/mmio_util.c
@@ -5,28 +5,40 @@
 #include <amdblocks/acpimmio_map.h>
 #include <amdblocks/acpimmio.h>
 
-uint8_t *const acpimmio_sm_pci	= ACPIMMIO_BASE(SM_PCI);
-uint8_t *const acpimmio_gpio_100 = ACPIMMIO_BASE(GPIO_100);
-uint8_t *const acpimmio_smi	= ACPIMMIO_BASE(SMI);
-uint8_t *const acpimmio_pmio	= ACPIMMIO_BASE(PMIO);
-uint8_t *const acpimmio_pmio2	= ACPIMMIO_BASE(PMIO2);
-uint8_t *const acpimmio_biosram	= ACPIMMIO_BASE(BIOSRAM);
-uint8_t *const acpimmio_cmosram	= ACPIMMIO_BASE(CMOSRAM);
-uint8_t *const acpimmio_cmos	= ACPIMMIO_BASE(CMOS);
-uint8_t *const acpimmio_acpi	= ACPIMMIO_BASE(ACPI);
-uint8_t *const acpimmio_asf	= ACPIMMIO_BASE(ASF);
-uint8_t *const acpimmio_smbus	= ACPIMMIO_BASE(SMBUS);
-uint8_t *const acpimmio_wdt	= ACPIMMIO_BASE(WDT);
-uint8_t *const acpimmio_hpet	= ACPIMMIO_BASE(HPET);
-uint8_t *const acpimmio_iomux	= ACPIMMIO_BASE(IOMUX);
-uint8_t *const acpimmio_misc	= ACPIMMIO_BASE(MISC);
-uint8_t *const acpimmio_dpvga	= ACPIMMIO_BASE(DPVGA);
-uint8_t *const acpimmio_gpio0	= ACPIMMIO_BASE(GPIO0);
-uint8_t *const acpimmio_gpio1	= ACPIMMIO_BASE(GPIO1);
-uint8_t *const acpimmio_gpio2	= ACPIMMIO_BASE(GPIO2);
-uint8_t *const acpimmio_xhci_pm	= ACPIMMIO_BASE(XHCIPM);
-uint8_t *const acpimmio_acdc_tmr	= ACPIMMIO_BASE(ACDCTMR);
-uint8_t *const acpimmio_aoac	= ACPIMMIO_BASE(AOAC);
+#define ACPI_BANK_PTR(bank) \
+	(void *)(uintptr_t)(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_ ## bank ## _BANK)
+
+#if CONSTANT_ACPIMMIO_BASE_ADDRESS
+#define DECLARE_ACPIMMIO(ptr, bank) \
+	uint8_t *const ptr = ACPI_BANK_PTR(bank)
+#else
+#define DECLARE_ACPIMMIO(ptr, bank) uint8_t *ptr
+#endif
+
+DECLARE_ACPIMMIO(acpimmio_sm_pci, SM_PCI);
+DECLARE_ACPIMMIO(acpimmio_gpio_100, GPIO_100);
+DECLARE_ACPIMMIO(acpimmio_smi, SMI);
+DECLARE_ACPIMMIO(acpimmio_pmio, PMIO);
+DECLARE_ACPIMMIO(acpimmio_pmio2, PMIO2);
+DECLARE_ACPIMMIO(acpimmio_biosram, BIOSRAM);
+DECLARE_ACPIMMIO(acpimmio_cmosram, CMOSRAM);
+DECLARE_ACPIMMIO(acpimmio_cmos, CMOS);
+DECLARE_ACPIMMIO(acpimmio_acpi, ACPI);
+DECLARE_ACPIMMIO(acpimmio_asf, ASF);
+DECLARE_ACPIMMIO(acpimmio_smbus, SMBUS);
+DECLARE_ACPIMMIO(acpimmio_wdt, WDT);
+DECLARE_ACPIMMIO(acpimmio_hpet, HPET);
+DECLARE_ACPIMMIO(acpimmio_iomux, IOMUX);
+DECLARE_ACPIMMIO(acpimmio_misc, MISC);
+DECLARE_ACPIMMIO(acpimmio_dpvga, DPVGA);
+DECLARE_ACPIMMIO(acpimmio_gpio0, GPIO0);
+DECLARE_ACPIMMIO(acpimmio_gpio1, GPIO1);
+DECLARE_ACPIMMIO(acpimmio_gpio2, GPIO2);
+DECLARE_ACPIMMIO(acpimmio_xhci_pm, XHCIPM);
+DECLARE_ACPIMMIO(acpimmio_acdc_tmr, ACDCTMR);
+DECLARE_ACPIMMIO(acpimmio_aoac, AOAC);
+
+#undef DECLARE_ACPIMMIO
 
 void enable_acpimmio_decode_pm24(void)
 {
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 3d0cf06688..d3deff1153 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -23,28 +23,39 @@
 #define   PM_04_BIOSRAM_DECODE_EN	BIT(0)
 #define   PM_04_ACPIMMIO_DECODE_EN	BIT(1)
 
-extern uint8_t *const acpimmio_gpio_100;
-extern uint8_t *const acpimmio_sm_pci;
-extern uint8_t *const acpimmio_smi;
-extern uint8_t *const acpimmio_pmio;
-extern uint8_t *const acpimmio_pmio2;
-extern uint8_t *const acpimmio_biosram;
-extern uint8_t *const acpimmio_cmosram;
-extern uint8_t *const acpimmio_cmos;
-extern uint8_t *const acpimmio_acpi;
-extern uint8_t *const acpimmio_asf;
-extern uint8_t *const acpimmio_smbus;
-extern uint8_t *const acpimmio_wdt;
-extern uint8_t *const acpimmio_hpet;
-extern uint8_t *const acpimmio_iomux;
-extern uint8_t *const acpimmio_misc;
-extern uint8_t *const acpimmio_dpvga;
-extern uint8_t *const acpimmio_gpio0;
-extern uint8_t *const acpimmio_gpio1;
-extern uint8_t *const acpimmio_gpio2;
-extern uint8_t *const acpimmio_xhci_pm;
-extern uint8_t *const acpimmio_acdc_tmr;
-extern uint8_t *const acpimmio_aoac;
+/* For x86 base is constant, while PSP does mapping runtime. */
+#define CONSTANT_ACPIMMIO_BASE_ADDRESS	ENV_X86
+
+#if CONSTANT_ACPIMMIO_BASE_ADDRESS
+#define MAYBE_CONST const
+#else
+#define MAYBE_CONST
+#endif
+
+extern uint8_t *MAYBE_CONST acpimmio_gpio_100;
+extern uint8_t *MAYBE_CONST acpimmio_sm_pci;
+extern uint8_t *MAYBE_CONST acpimmio_smi;
+extern uint8_t *MAYBE_CONST acpimmio_pmio;
+extern uint8_t *MAYBE_CONST acpimmio_pmio2;
+extern uint8_t *MAYBE_CONST acpimmio_biosram;
+extern uint8_t *MAYBE_CONST acpimmio_cmosram;
+extern uint8_t *MAYBE_CONST acpimmio_cmos;
+extern uint8_t *MAYBE_CONST acpimmio_acpi;
+extern uint8_t *MAYBE_CONST acpimmio_asf;
+extern uint8_t *MAYBE_CONST acpimmio_smbus;
+extern uint8_t *MAYBE_CONST acpimmio_wdt;
+extern uint8_t *MAYBE_CONST acpimmio_hpet;
+extern uint8_t *MAYBE_CONST acpimmio_iomux;
+extern uint8_t *MAYBE_CONST acpimmio_misc;
+extern uint8_t *MAYBE_CONST acpimmio_dpvga;
+extern uint8_t *MAYBE_CONST acpimmio_gpio0;
+extern uint8_t *MAYBE_CONST acpimmio_gpio1;
+extern uint8_t *MAYBE_CONST acpimmio_gpio2;
+extern uint8_t *MAYBE_CONST acpimmio_xhci_pm;
+extern uint8_t *MAYBE_CONST acpimmio_acdc_tmr;
+extern uint8_t *MAYBE_CONST acpimmio_aoac;
+
+#undef MAYBE_CONST
 
 /* For older discrete FCHs */
 void enable_acpimmio_decode_pm24(void);
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
index d230d541a9..758a55622e 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio_map.h
@@ -126,9 +126,6 @@
 #define ACPIMMIO_ACDCTMR_BANK		0x1d00
 #define ACPIMMIO_AOAC_BANK		0x1e00
 
-#define ACPIMMIO_BASE(x) \
-	(void *)(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_ ## x ## _BANK)
-
 /* FIXME: Passing host base for SMBUS is not long-term solution. */
 #define ACPIMMIO_ASF_BASE	(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_ASF_BANK)
 #define ACPIMMIO_SMBUS_BASE	(AMD_SB_ACPI_MMIO_ADDR + ACPIMMIO_SMBUS_BANK)