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author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-11-18 15:20:42 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-12-08 11:32:37 +0000 |
commit | 9f01bbf410fcf6cb4eaf06863b0185501112984d (patch) | |
tree | 41c415010e7dd8e86435d7c130f7cf25659260f7 /src/soc/amd/common/block | |
parent | eb102ccbd6a41d55478a8b9a95ef1f093ecaf82a (diff) |
mb/google/corsola: Enable Chrome EC
Initialize SPI bus 1 for Chrome EC control.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I7d032d595f7ca1dbed3de4dfe308ff4be64333cd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59941
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/amd/common/block')
0 files changed, 0 insertions, 0 deletions