diff options
| author | Zheng Bao <fishbaozi@gmail.com> | 2023-02-14 13:26:31 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-09-01 11:47:15 +0000 |
| commit | 6bc06983ed1d6c545056b584eabc2f7864cb39cd (patch) | |
| tree | 85e01a12ae0de1e768747bc3760ff9300faf517e /src/soc/amd/common/block | |
| parent | d0de6c2183af5f6c435e53632fe92793be4d3783 (diff) | |
util/amdfwtool: Deal with psp position in flash offset directly
It is based on work by Arthur Heymans, 69852.
Get rid of the confusing "position index" and use the relative flash
offset as the Kconfig setting instead.
TEST=binary identical on amd/birman amd/majolica amd/gardenia
amd/mayan amd/bilby amd/mandolin amd/chausie amd/pademelon
pcengines/apu2
google/skyrim google/guybrush google/zork google/kahlee google/myst
(The test should be done with INCLUDE_CONFIG_FILE=n)
Change-Id: I26bde0b7c70efe9f5762109f431329ea7f95b7f2
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/psp_efs.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/Kconfig | 68 |
2 files changed, 69 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/psp_efs.h b/src/soc/amd/common/block/include/amdblocks/psp_efs.h index a930bc9a95..02f027c8b4 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp_efs.h +++ b/src/soc/amd/common/block/include/amdblocks/psp_efs.h @@ -6,7 +6,7 @@ #include <types.h> -#define EFS_OFFSET (CONFIG_ROM_SIZE - (0x80000 << CONFIG_AMD_FWM_POSITION_INDEX) + 0x20000) +#define EFS_OFFSET CONFIG_AMD_FWM_POSITION #define EMBEDDED_FW_SIGNATURE 0x55aa55aa diff --git a/src/soc/amd/common/block/psp/Kconfig b/src/soc/amd/common/block/psp/Kconfig index d59e6fc4bf..68d68615ea 100644 --- a/src/soc/amd/common/block/psp/Kconfig +++ b/src/soc/amd/common/block/psp/Kconfig @@ -55,3 +55,71 @@ config PSP_INCLUDES_HSP default n help Select this config to indicate SoC includes Hardware Security Processor(HSP). + +config AMD_FWM_POSITION_20000_DEFAULT + bool "0x20000" + +config AMD_FWM_POSITION_420000_DEFAULT + bool "0x420000" + +config AMD_FWM_POSITION_820000_DEFAULT + bool "0x820000" + +config AMD_FWM_POSITION_C20000_DEFAULT + bool "0xC20000" + +config AMD_FWM_POSITION_E20000_DEFAULT + bool "0xE20000" + +config AMD_FWM_POSITION_F20000_DEFAULT + bool "0xF20000" + +config AMD_FWM_POSITION_FA0000_DEFAULT + bool "0xFA0000" + +choice AMD_FWM_POSITION_CHOICE + prompt "AMD FW position" + default AMD_FWM_POSITION_420000 if AMD_FWM_POSITION_420000_DEFAULT + default AMD_FWM_POSITION_820000 if AMD_FWM_POSITION_820000_DEFAULT + default AMD_FWM_POSITION_C20000 if AMD_FWM_POSITION_C20000_DEFAULT + default AMD_FWM_POSITION_E20000 if AMD_FWM_POSITION_E20000_DEFAULT + default AMD_FWM_POSITION_F20000 if AMD_FWM_POSITION_F20000_DEFAULT + default AMD_FWM_POSITION_FA0000 if AMD_FWM_POSITION_FA0000_DEFAULT + default AMD_FWM_POSITION_20000 + help + Set the position on flash offset where the AMD FW needs to be. + This position is relative to a 16MB flash window. If the flash + size is smaller than 16MB it gets mapped at the top of that window. + +config AMD_FWM_POSITION_20000 + bool "0x20000" + +config AMD_FWM_POSITION_420000 + bool "0x420000" + +config AMD_FWM_POSITION_820000 + bool "0x820000" + +config AMD_FWM_POSITION_C20000 + bool "0xC20000" + +config AMD_FWM_POSITION_E20000 + bool "0xE20000" + +config AMD_FWM_POSITION_F20000 + bool "0xF20000" + +config AMD_FWM_POSITION_FA0000 + bool "0xFA0000" + +endchoice + +config AMD_FWM_POSITION + hex + default 0x20000 if AMD_FWM_POSITION_20000 + default 0x420000 if AMD_FWM_POSITION_420000 + default 0x820000 if AMD_FWM_POSITION_820000 + default 0xc20000 if AMD_FWM_POSITION_C20000 + default 0xe20000 if AMD_FWM_POSITION_E20000 + default 0xf20000 if AMD_FWM_POSITION_F20000 + default 0xfa0000 if AMD_FWM_POSITION_FA0000 |