diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-07-16 09:48:27 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-17 21:59:05 +0000 |
| commit | 68fc51faf2cc83742b527b68a9009b81428b9ff2 (patch) | |
| tree | 5cac120c129c4c382301ee503f08e59f222ee471 /src/soc/amd/common/block | |
| parent | f9b535eecfda5065182aae9ec031956826cd1804 (diff) | |
soc/amd/common: Fix some white spaces issues
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I54438978db13ba00188e53239f7034d1b258e912
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/acpi/ivrs.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpimmio/biosram.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/early_cache.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/pci/amd_pci_util.c | 4 |
4 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c index b78cc53bb8..f0bcef6dc7 100644 --- a/src/soc/amd/common/block/acpi/ivrs.c +++ b/src/soc/amd/common/block/acpi/ivrs.c @@ -62,7 +62,7 @@ static unsigned long ivhd_describe_hpet(unsigned long current) static unsigned long ivhd_describe_f0_device(unsigned long current, uint16_t dev_id, uint8_t datasetting) { - ivrs_ivhd_f0_entry_t *ivhd_f0 = (ivrs_ivhd_f0_entry_t *) current; + ivrs_ivhd_f0_entry_t *ivhd_f0 = (ivrs_ivhd_f0_entry_t *)current; ivhd_f0->type = IVHD_DEV_VARIABLE; ivhd_f0->dev_id = dev_id; @@ -287,7 +287,7 @@ static unsigned long acpi_fill_ivrs11(unsigned long current, acpi_ivrs_t *ivrs) ivhd_11->iommu_base_high = ivrs->ivhd.iommu_base_high; ivhd_11->pci_segment_group = 0x0000; ivhd_11->iommu_info = ivrs->ivhd.iommu_info; - ivhd11_attr_ptr = (ivhd11_iommu_attr_t *) &ivrs->ivhd.iommu_feature_info; + ivhd11_attr_ptr = (ivhd11_iommu_attr_t *)&ivrs->ivhd.iommu_feature_info; ivhd_11->iommu_attributes.perf_counters = ivhd11_attr_ptr->perf_counters; ivhd_11->iommu_attributes.perf_counter_banks = ivhd11_attr_ptr->perf_counter_banks; ivhd_11->iommu_attributes.msi_num_ppr = ivhd11_attr_ptr->msi_num_ppr; diff --git a/src/soc/amd/common/block/acpimmio/biosram.c b/src/soc/amd/common/block/acpimmio/biosram.c index 06bbed99e0..76f24e0082 100644 --- a/src/soc/amd/common/block/acpimmio/biosram.c +++ b/src/soc/amd/common/block/acpimmio/biosram.c @@ -75,8 +75,8 @@ void save_uma_size(uint32_t size) void save_uma_base(uint64_t base) { - biosram_write32(BIOSRAM_UMA_BASE, (uint32_t) base); - biosram_write32(BIOSRAM_UMA_BASE + 4, (uint32_t) (base >> 32)); + biosram_write32(BIOSRAM_UMA_BASE, (uint32_t)base); + biosram_write32(BIOSRAM_UMA_BASE + 4, (uint32_t)(base >> 32)); } uint32_t get_uma_size(void) diff --git a/src/soc/amd/common/block/cpu/noncar/early_cache.c b/src/soc/amd/common/block/cpu/noncar/early_cache.c index 94c8b10272..d8684eea4d 100644 --- a/src/soc/amd/common/block/cpu/noncar/early_cache.c +++ b/src/soc/amd/common/block/cpu/noncar/early_cache.c @@ -60,7 +60,7 @@ void early_cache_setup(void) wrmsr(SYSCFG_MSR, sys_cfg); - var_mtrr_set(&mtrr_ctx.ctx, 0, ALIGN_DOWN(top_mem.lo, 8*MiB), MTRR_TYPE_WRBACK); + var_mtrr_set(&mtrr_ctx.ctx, 0, ALIGN_DOWN(top_mem.lo, 8 * MiB), MTRR_TYPE_WRBACK); /* TODO: check if we should always mark 16 MByte below 4 GByte as WRPROT */ var_mtrr_set(&mtrr_ctx.ctx, FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); diff --git a/src/soc/amd/common/block/pci/amd_pci_util.c b/src/soc/amd/common/block/pci/amd_pci_util.c index 6c5565f268..d665a81bc2 100644 --- a/src/soc/amd/common/block/pci/amd_pci_util.c +++ b/src/soc/amd/common/block/pci/amd_pci_util.c @@ -67,11 +67,11 @@ void write_pci_int_table(void) */ for (i = 0 ; i < limit; i++) { byte = idx_name[i].index; - write_pci_int_idx(byte, 0, (u8) picr_data_ptr[byte]); + write_pci_int_idx(byte, 0, (u8)picr_data_ptr[byte]); printk(BIOS_DEBUG, "0x%02X\t\t%-20s 0x%02X\t", byte, idx_name[i].name, read_pci_int_idx(byte, 0)); - write_pci_int_idx(byte, 1, (u8) intr_data_ptr[byte]); + write_pci_int_idx(byte, 1, (u8)intr_data_ptr[byte]); printk(BIOS_DEBUG, "0x%02X\n", read_pci_int_idx(byte, 1)); } } |