diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-08-06 18:12:37 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-07 16:31:35 +0000 |
| commit | 35946f957affc2e23830750dbf2a26586093ca76 (patch) | |
| tree | 0f74cd709d8ac1874c6278167706235fd1194032 /src/soc/amd/common/block | |
| parent | c3245274e960670fc7092a6676e3fb95ca8ea7fd (diff) | |
soc/amd/common/include/spi: add and use SPI_MISC_CNTRL define
This register is currently used by the SPI DMA code that sets an
undocumented bit. A later patch will add and use some other bit in this
register.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I48447dcfb3cee07619a9b42434731f0b21458021
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83773
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/spi.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/lpc/spi_dma.c | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index cf918143c7..babe6356f3 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -76,6 +76,8 @@ enum spi100_speed { #define SPI_FIFO_LAST_BYTE 0xc6 /* 0xc7 for Cezanne */ #define SPI_FIFO_DEPTH (SPI_FIFO_LAST_BYTE - SPI_FIFO + 1) +#define SPI_MISC_CNTRL 0xfc + struct spi_config { /* * Default values if not overridden by mainboard: diff --git a/src/soc/amd/common/block/lpc/spi_dma.c b/src/soc/amd/common/block/lpc/spi_dma.c index 701b61abb2..9ff9b0ead7 100644 --- a/src/soc/amd/common/block/lpc/spi_dma.c +++ b/src/soc/amd/common/block/lpc/spi_dma.c @@ -277,9 +277,9 @@ uint32_t spi_flash_get_mmap_windows(struct flash_mmap_window *table) static void spi_dma_fix(void) { /* Internal only registers */ - uint8_t val = spi_read8(0xfc); + uint8_t val = spi_read8(SPI_MISC_CNTRL); val |= BIT(6); - spi_write8(0xfc, val); + spi_write8(SPI_MISC_CNTRL, val); } void boot_device_init(void) |