diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-23 23:57:44 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-27 12:02:45 +0000 |
| commit | 2c9de49a971497fadaf5272fd1bacee7a316dbfc (patch) | |
| tree | 6efb7a4bb018c758d4e1e630b131343cd4d67ab8 /src/soc/amd/common/block | |
| parent | 23a398e001b55950f7759aa7ffa2ec966e2ea917 (diff) | |
soc/amd: introduce and use get_pstate_core_uvolts for SVI2 and SVI3
Since SVI3 has the CPU voltage ID split into two parts, a serial voltage
ID version specific function is needed to get the raw core VID value.
This will allow making get_pstate_core_power common for all AMD CPUs in
a follow-up patch.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I71ca88c38b307558905a26cce8be1e8ffc5fbed4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73996
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block')
| -rw-r--r-- | src/soc/amd/common/block/cpu/svi2.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/svi3.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/cpu.h | 1 |
3 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/cpu/svi2.c b/src/soc/amd/common/block/cpu/svi2.c index 0a41b78b26..21d459fb2a 100644 --- a/src/soc/amd/common/block/cpu/svi2.c +++ b/src/soc/amd/common/block/cpu/svi2.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/cpu.h> +#include <soc/msr.h> #include <types.h> /* Value defined in Serial VID Interface 2.0 spec (#48022, NDA only) */ @@ -17,3 +18,8 @@ uint32_t get_uvolts_from_vid(uint16_t core_vid) (SERIAL_VID_2_DECODE_MICROVOLTS * core_vid); } } + +uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg) +{ + return get_uvolts_from_vid(pstate_reg.cpu_vid_0_7); +} diff --git a/src/soc/amd/common/block/cpu/svi3.c b/src/soc/amd/common/block/cpu/svi3.c index 35a4a789de..c2e6bed612 100644 --- a/src/soc/amd/common/block/cpu/svi3.c +++ b/src/soc/amd/common/block/cpu/svi3.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/cpu.h> +#include <soc/msr.h> #include <types.h> /* Value defined in Serial VID Interface 3.0 spec (#56413, NDA only) */ @@ -17,3 +18,8 @@ uint32_t get_uvolts_from_vid(uint16_t core_vid) (SERIAL_VID_3_DECODE_MICROVOLTS * core_vid); } } + +uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg) +{ + return get_uvolts_from_vid(pstate_reg.cpu_vid_0_7 | pstate_reg.cpu_vid_8 << 8); +} diff --git a/src/soc/amd/common/block/include/amdblocks/cpu.h b/src/soc/amd/common/block/include/amdblocks/cpu.h index cbce028631..8c868cb99f 100644 --- a/src/soc/amd/common/block/include/amdblocks/cpu.h +++ b/src/soc/amd/common/block/include/amdblocks/cpu.h @@ -18,6 +18,7 @@ union pstate_msr; /* proper definition is in soc/msr.h */ uint32_t get_uvolts_from_vid(uint16_t core_vid); uint32_t get_pstate_core_freq(union pstate_msr pstate_reg); +uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg); uint32_t get_pstate_core_power(union pstate_msr pstate_reg); const acpi_cstate_t *get_cstate_config_data(size_t *size); |