diff options
| author | Fred Reitberger <reitbergerfred@gmail.com> | 2022-11-01 10:49:16 -0400 |
|---|---|---|
| committer | Fred Reitberger <reitbergerfred@gmail.com> | 2022-11-04 20:36:49 +0000 |
| commit | 2890841e6f8ff05850d2327480fda260020e5c61 (patch) | |
| tree | 34891f2624b77e6b936c1d6e5aa436938cb341e6 /src/soc/amd/common/block | |
| parent | 437d011621cb3c1b929314c5807c2e3d014906d8 (diff) | |
soc/amd/*/data_fabric: Move register offsets to soc
Morgana/Glinda have a different register mapping for data fabric access,
although the registers themselves are mostly compatible. The register
layouts defined by each soc capture the differences and the common code
can use those.
Move the register offsets to soc headers and update the offsets for
morgana/glinda per morgana ppr #57396, rev 1.52 and glinda ppr #57254,
rev 1.51
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I9e5e7c85f99a9afa873764ade9734831fb5cfe69
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/common/block')
3 files changed, 1 insertions, 31 deletions
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_def.h b/src/soc/amd/common/block/data_fabric/data_fabric_def.h deleted file mode 100644 index 2076d1633c..0000000000 --- a/src/soc/amd/common/block/data_fabric/data_fabric_def.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_BLOCK_DATA_FABRIC_DEF_H -#define AMD_BLOCK_DATA_FABRIC_DEF_H - -#define DF_FICAA_BIOS 0x5C -#define DF_FICAD_LO 0x98 -#define DF_FICAD_HI 0x9C - -#define DF_IND_CFG_INST_ACC_EN (1 << 0) -#define DF_IND_CFG_ACC_REG_SHIFT 2 -#define DF_IND_CFG_ACC_REG_MASK (0x1ff << DF_IND_CFG_ACC_REG_SHIFT) -#define DF_IND_CFG_ACC_FUN_SHIFT 11 -#define DF_IND_CFG_ACC_FUN_MASK (0x7 << DF_IND_CFG_ACC_FUN_SHIFT) -#define DF_IND_CFG_64B_EN_SHIFT 14 -#define DF_IND_CFG_64B_EN (0x1 << DF_IND_CFG_64B_EN_SHIFT) -#define DF_IND_CFG_INST_ID_SHIFT 16 -#define DF_IND_CFG_INST_ID_MASK (0xff << DF_IND_CFG_INST_ID_SHIFT) - -#endif /* AMD_BLOCK_DATA_FABRIC_DEF_H */ diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index 5a40ba5d8b..181c71e57f 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -9,7 +9,6 @@ #include <soc/data_fabric.h> #include <soc/pci_devs.h> #include <types.h> -#include "data_fabric_def.h" static void data_fabric_set_indirect_address(uint8_t func, uint16_t reg, uint8_t instance_id) { diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 5cc7f4867b..4f8dcd4d85 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -5,21 +5,12 @@ #include <amdblocks/pci_devs.h> #include <device/pci_ops.h> +#include <soc/data_fabric.h> #include <soc/pci_devs.h> #include <stdint.h> #define BROADCAST_FABRIC_ID 0xff -/* D18F0 - Fabric Configuration registers */ -#define D18F0_MMIO_BASE0 0x200 -#define D18F0_MMIO_LIMIT0 0x204 -#define D18F0_MMIO_SHIFT 16 -#define D18F0_MMIO_CTRL0 0x208 -/* The MMIO_NP bit is SoC-specific */ -#define DF_MMIO_DST_FABRIC_ID_SHIFT 4 -#define DF_MMIO_WE BIT(1) -#define DF_MMIO_RE BIT(0) - /* The number of data fabric MMIO registers is SoC-specific */ #define NB_MMIO_BASE(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_BASE0) #define NB_MMIO_LIMIT(reg) ((reg) * 4 * sizeof(uint32_t) + D18F0_MMIO_LIMIT0) |