amd/pi: Add GetTempHeapBase callout

Implement a new AGESA callout that may be used to find the correct
temporary location in DRAM to store heap data.

Near the end of AmdInitPost, AGESA migrates its heap from a CAR-based
location to a temporary region.  Once cbmem has been established, the
heap will be relocated again in AmdInitEnv from the temp location to
the final one.

This patch does not materially affect the behavior of AGESA's heap
management.  It only puts coreboot in control of the location.  Future
work may refactor the copying.

TEST=Boot grunt with patchstack and experimental blob
BUG=b:74518368

Change-Id: Ibc5cc988e3e80d78f50cf0195e952b657141e570
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/26146
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

3 files changed, 46 insertions, 0 deletions

diff --git a/src/soc/amd/common/block/pi/Kconfig b/src/soc/amd/common/block/pi/Kconfig
index bd5926fdc4..547232ef66 100644
--- a/src/soc/amd/common/block/pi/Kconfig
+++ b/src/soc/amd/common/block/pi/Kconfig
@@ -4,3 +4,23 @@ config SOC_AMD_COMMON_BLOCK_PI
 	default n
 	help
 	  This option builds functions that interface AMD's AGESA.
+
+if SOC_AMD_COMMON_BLOCK_PI
+
+config PI_AGESA_TEMP_RAM_BASE
+	hex
+	default 0x100000
+	help
+	  During a boot from S5, AGESA copies its CAR-based heap to a temporary
+	  location in DRAM.  Once coreboot has established cbmem, the heap
+	  is moved again.  This symbol determines the temporary location for
+	  the heap.
+
+config PI_AGESA_HEAP_SIZE
+	hex
+	default 0x20000
+	help
+	  This option determines the amount of space allowed for AGESA heap
+	  prior to DRAM availability.
+
+endif
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 2c17a3f8a5..0adff7d8b2 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -45,6 +45,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
 	{ AGESA_LOCATE_BUFFER,            agesa_LocateBuffer },
 	{ AGESA_READ_SPD,                 agesa_ReadSpd },
 	{ AGESA_GNB_PCIE_SLOT_RESET,      agesa_PcieSlotResetControl },
+	{ AGESA_GET_TEMP_HEAP_BASE,       agesa_GetTempHeapBase },
 #if ENV_RAMSTAGE
 	{ AGESA_RUNFUNC_ONAP,             agesa_RunFuncOnAp },
 	{ AGESA_RUNFUNC_ON_ALL_APS,       agesa_RunFcnOnAllAps },
diff --git a/src/soc/amd/common/block/pi/heapmanager.c b/src/soc/amd/common/block/pi/heapmanager.c
index a75a440f8d..98a8ce14e2 100644
--- a/src/soc/amd/common/block/pi/heapmanager.c
+++ b/src/soc/amd/common/block/pi/heapmanager.c
@@ -31,6 +31,31 @@ static void EmptyHeap(int unused)
 }
 
 /*
+ * Name			agesa_GetTempHeapBase
+ * Brief description	Get the location for TempRam, the target location in
+ *			memory where AmdInitPost copies the heap prior to CAR
+ *			teardown.  AmdInitEnv calls this function after
+ *			teardown for the source address when relocation the
+ *			heap to its final location.
+ * Input parameters
+ *	Func		Unused
+ *	Data		Unused
+ *	ConfigPtr	Pointer to type AGESA_TEMP_HEAP_BASE_PARAMS
+ * Output parameters
+ *	Status		Indicates whether TempHeapAddress was successfully
+ *			set.
+ */
+AGESA_STATUS agesa_GetTempHeapBase(UINT32 Func, UINTN Data, VOID *ConfigPtr)
+{
+	AGESA_TEMP_HEAP_BASE_PARAMS *pTempHeapBase;
+
+	pTempHeapBase = (AGESA_TEMP_HEAP_BASE_PARAMS *)ConfigPtr;
+	pTempHeapBase->TempHeapAddress = CONFIG_PI_AGESA_TEMP_RAM_BASE;
+
+	return AGESA_SUCCESS;
+}
+
+/*
  * Name			FindAllocatedNode
  * Brief description	Find an allocated node that matches the handle.
  * Input parameter	The desired handle.