diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-18 19:18:21 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-29 15:49:54 +0000 |
| commit | 39bd46f4a4f3c1cc76f1007f82050c943fd09bb5 (patch) | |
| tree | a3f3aa4016b8ac0793ed5bccd7c5b26ed474592d /src/soc/amd/common/block/include | |
| parent | 9f6622fb5588a9322b7f1c71bc198d0c2e1dd1bf (diff) | |
soc/amd/common: Drop ACPIMMIO GPIO bank separation
The banks are one after each other in the ACPIMMIO space. Also
there is space for more banks and existing ASL takes advantage
of the property.
Change-Id: Ib78559a60b5c20d53a60e1726ee2aad1f38f78ce
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42522
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/include')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/acpimmio.h | 22 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/gpio_banks.h | 5 |
2 files changed, 22 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h index d3deff1153..2775b52116 100644 --- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h +++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h @@ -353,6 +353,28 @@ static inline void gpio_100_write32(uint8_t reg, uint32_t value) } /* New GPIO banks configuration registers */ + +static inline void *gpio_ctrl_ptr(uint8_t gpio_num) +{ + return acpimmio_gpio0 + gpio_num * sizeof(uint32_t); +} + +static inline uint32_t gpio_read32(uint8_t gpio_num) +{ + return read32(gpio_ctrl_ptr(gpio_num)); +} + +static inline void gpio_write32(uint8_t gpio_num, uint32_t value) +{ + write32(gpio_ctrl_ptr(gpio_num), value); +} + +static inline void gpio_write32_rb(uint8_t gpio_num, uint32_t value) +{ + write32(gpio_ctrl_ptr(gpio_num), value); + read32(gpio_ctrl_ptr(gpio_num)); +} + /* GPIO bank 0 */ static inline uint8_t gpio0_read8(uint8_t reg) { diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h index f4288aa072..da65e08d70 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h @@ -5,7 +5,6 @@ #include <stdint.h> #include <stddef.h> -#include <amdblocks/acpimmio.h> struct soc_amd_gpio { uint8_t gpio; @@ -19,10 +18,6 @@ struct soc_amd_event { uint8_t event; }; -#define GPIO_BANK0_CONTROL(gpio) ((uintptr_t)acpimmio_gpio0 + ((gpio) * 4)) -#define GPIO_BANK1_CONTROL(gpio) ((uintptr_t)acpimmio_gpio1 + (((gpio) - 64) * 4)) -#define GPIO_BANK2_CONTROL(gpio) ((uintptr_t)acpimmio_gpio2 + (((gpio) - 128) * 4)) - #define GPIO_MASTER_SWITCH 0xFC #define GPIO_MASK_STS_EN BIT(28) #define GPIO_INTERRUPT_EN BIT(30) |