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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-25 21:23:37 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-28 21:50:12 +0000
commit5b672d595411a50012d3d232db6d886818d44893 (patch)
tree06ead78b90df1ec04fe71c29f52068290821f115 /src/soc/amd/common/block/include/amdblocks/gpio_banks.h
parentb0ae42b5bb7fe7c9f6e8301bff8fbabe95294c62 (diff)
soc/amd/common: Access ACPIMMIO via proper symbols
Using proper symbols for base addresses, it is possible to only define the symbols for base addresses implemented for the specific platform and executing stage. Change-Id: Ib8599ee93bfb1c2d6d9b4accfca1ebbefe758e09 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37324 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks/gpio_banks.h')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/gpio_banks.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
index 572e639f70..f4288aa072 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
@@ -5,7 +5,7 @@
#include <stdint.h>
#include <stddef.h>
-#include <amdblocks/acpimmio_map.h>
+#include <amdblocks/acpimmio.h>
struct soc_amd_gpio {
uint8_t gpio;
@@ -19,9 +19,9 @@ struct soc_amd_event {
uint8_t event;
};
-#define GPIO_BANK0_CONTROL(gpio) (ACPIMMIO_GPIO0_BASE + ((gpio) * 4))
-#define GPIO_BANK1_CONTROL(gpio) (ACPIMMIO_GPIO1_BASE + (((gpio) - 64) * 4))
-#define GPIO_BANK2_CONTROL(gpio) (ACPIMMIO_GPIO2_BASE + (((gpio) - 128) * 4))
+#define GPIO_BANK0_CONTROL(gpio) ((uintptr_t)acpimmio_gpio0 + ((gpio) * 4))
+#define GPIO_BANK1_CONTROL(gpio) ((uintptr_t)acpimmio_gpio1 + (((gpio) - 64) * 4))
+#define GPIO_BANK2_CONTROL(gpio) ((uintptr_t)acpimmio_gpio2 + (((gpio) - 128) * 4))
#define GPIO_MASTER_SWITCH 0xFC
#define GPIO_MASK_STS_EN BIT(28)