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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-04 13:36:53 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-06-28 21:50:38 +0000
commitbe1ff7eb724bc674eb0f501b4b42675a679adbab (patch)
tree800da225e06e9d63f5ab45fa0f24dd3f3271c58f /src/soc/amd/common/block/include/amdblocks/acpimmio.h
parent5b672d595411a50012d3d232db6d886818d44893 (diff)
soc/amd/common: Allow runtime mapping of ACPIMMIO banks
Future implementation of verstage running on PSP will have access to some of the ACPIMMIO banks, but banks will be mapped runtime at non-deterministic addresses. Provide preprocessor helpers to accomplish this. Change-Id: I8d50de60bb1ea1b3a521ab535a5637c4de8c3559 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42073 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks/acpimmio.h')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio.h55
1 files changed, 33 insertions, 22 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 3d0cf06688..d3deff1153 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -23,28 +23,39 @@
#define PM_04_BIOSRAM_DECODE_EN BIT(0)
#define PM_04_ACPIMMIO_DECODE_EN BIT(1)
-extern uint8_t *const acpimmio_gpio_100;
-extern uint8_t *const acpimmio_sm_pci;
-extern uint8_t *const acpimmio_smi;
-extern uint8_t *const acpimmio_pmio;
-extern uint8_t *const acpimmio_pmio2;
-extern uint8_t *const acpimmio_biosram;
-extern uint8_t *const acpimmio_cmosram;
-extern uint8_t *const acpimmio_cmos;
-extern uint8_t *const acpimmio_acpi;
-extern uint8_t *const acpimmio_asf;
-extern uint8_t *const acpimmio_smbus;
-extern uint8_t *const acpimmio_wdt;
-extern uint8_t *const acpimmio_hpet;
-extern uint8_t *const acpimmio_iomux;
-extern uint8_t *const acpimmio_misc;
-extern uint8_t *const acpimmio_dpvga;
-extern uint8_t *const acpimmio_gpio0;
-extern uint8_t *const acpimmio_gpio1;
-extern uint8_t *const acpimmio_gpio2;
-extern uint8_t *const acpimmio_xhci_pm;
-extern uint8_t *const acpimmio_acdc_tmr;
-extern uint8_t *const acpimmio_aoac;
+/* For x86 base is constant, while PSP does mapping runtime. */
+#define CONSTANT_ACPIMMIO_BASE_ADDRESS ENV_X86
+
+#if CONSTANT_ACPIMMIO_BASE_ADDRESS
+#define MAYBE_CONST const
+#else
+#define MAYBE_CONST
+#endif
+
+extern uint8_t *MAYBE_CONST acpimmio_gpio_100;
+extern uint8_t *MAYBE_CONST acpimmio_sm_pci;
+extern uint8_t *MAYBE_CONST acpimmio_smi;
+extern uint8_t *MAYBE_CONST acpimmio_pmio;
+extern uint8_t *MAYBE_CONST acpimmio_pmio2;
+extern uint8_t *MAYBE_CONST acpimmio_biosram;
+extern uint8_t *MAYBE_CONST acpimmio_cmosram;
+extern uint8_t *MAYBE_CONST acpimmio_cmos;
+extern uint8_t *MAYBE_CONST acpimmio_acpi;
+extern uint8_t *MAYBE_CONST acpimmio_asf;
+extern uint8_t *MAYBE_CONST acpimmio_smbus;
+extern uint8_t *MAYBE_CONST acpimmio_wdt;
+extern uint8_t *MAYBE_CONST acpimmio_hpet;
+extern uint8_t *MAYBE_CONST acpimmio_iomux;
+extern uint8_t *MAYBE_CONST acpimmio_misc;
+extern uint8_t *MAYBE_CONST acpimmio_dpvga;
+extern uint8_t *MAYBE_CONST acpimmio_gpio0;
+extern uint8_t *MAYBE_CONST acpimmio_gpio1;
+extern uint8_t *MAYBE_CONST acpimmio_gpio2;
+extern uint8_t *MAYBE_CONST acpimmio_xhci_pm;
+extern uint8_t *MAYBE_CONST acpimmio_acdc_tmr;
+extern uint8_t *MAYBE_CONST acpimmio_aoac;
+
+#undef MAYBE_CONST
/* For older discrete FCHs */
void enable_acpimmio_decode_pm24(void);