soc/amd/common: Add AcpiMmio access for SMBus PCI device

The standard PCI register space for D14F0 is accessible at 0xfed80000.
Add functions for use as helpers.

Change-Id: Icbf5bdc449322c3f5e59e6126d709cb2808591d5
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34914
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 11 insertions, 0 deletions

diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 59ab9e5f4f..ca57cf5dcc 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -21,6 +21,9 @@
 #include <stdint.h>
 /* iomap.h must indicate if the device uses a block, optional if unused. */
 #include <soc/iomap.h>
+#ifndef SUPPORTS_ACPIMMIO_SM_PCI_BASE
+  #define SUPPORTS_ACPIMMIO_SM_PCI_BASE		0
+#endif
 #ifndef SUPPORTS_ACPIMMIO_SMI_BASE
   #define SUPPORTS_ACPIMMIO_SMI_BASE		0
 #endif
@@ -162,6 +165,14 @@
 /* Enable the AcpiMmio range at 0xfed80000 */
 void enable_acpimmio_decode(void);
 
+/* Access SMBus PCI registers at 0xfed80000 */
+uint8_t sm_pci_read8(uint8_t reg);
+uint16_t sm_pci_read16(uint8_t reg);
+uint32_t sm_pci_read32(uint8_t reg);
+void sm_pci_write8(uint8_t reg, uint8_t value);
+void sm_pci_write16(uint8_t reg, uint16_t value);
+void sm_pci_write32(uint8_t reg, uint32_t value);
+
 /* Access PM registers using IO cycles */
 uint8_t pm_io_read8(uint8_t reg);
 uint16_t pm_io_read16(uint8_t reg);