diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-16 00:48:49 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-16 23:54:54 +0000 |
| commit | e18a97813b9fccc26435837a77ec90e5711ce1f6 (patch) | |
| tree | ebee244283918c9163a91f288ef2e2712fa5c051 /src/soc/amd/common/block/cpu | |
| parent | 86e9b41ac239513f46046bbe6af6e9344a6699ff (diff) | |
soc/amd/common/*/Kconfig: remove unneeded default n for bool options
n is the default of bool Kconfig options, so no need to have that added
to each option.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8775d84caee6fda95eb7749e96090fe05417e764
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50779
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/cpu')
| -rw-r--r-- | src/soc/amd/common/block/cpu/Kconfig | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index f418ee7cc5..851b09175d 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -1,6 +1,5 @@ config SOC_AMD_COMMON_BLOCK_CAR bool - default n help This option allows the SOC to use a standard AMD cache-as-ram (CAR) implementation. CAR setup is built into bootblock and teardown is @@ -14,7 +13,6 @@ config SOC_AMD_COMMON_BLOCK_CAR config SOC_AMD_COMMON_BLOCK_NONCAR bool - default n help From family 17h on AMD CPUs/APUs don't use cache as RAM (CAR) any more, since the RAM initialization is already done by the PSP when @@ -30,7 +28,6 @@ endif # SOC_AMD_COMMON_BLOCK_NONCAR config SOC_AMD_COMMON_BLOCK_SMM bool - default n help Add common SMM relocation and handler functionality to the build. @@ -39,7 +36,6 @@ config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function select TSC_SYNC_LFENCE select UDELAY_TSC - default n help Select this option to add the common functions for getting the TSC frequency of AMD family 17h and 19h CPUs/APUs and to provide TSC- @@ -48,7 +44,6 @@ config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H config SOC_AMD_COMMON_BLOCK_UCODE bool select SUPPORT_CPU_UCODE_IN_CBFS - default n help Builds in support for loading uCode. |