diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-02-05 10:24:22 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-10 16:23:56 +0000 |
| commit | d86db1ca8ec24e70d1c96e466df8fbf8ae79ea49 (patch) | |
| tree | 23e1efc313281f5e29ca44b91d025cb807c4b7f7 /src/soc/amd/common/block/cpu | |
| parent | 1deca23f0aae91c49bb828dbea8b0a268c7c88ef (diff) | |
soc/amd/common/block: Fix guards for PSP transfer buffer
The transfer buffer is only required when using
VBOOT_STARTS_BEFORE_BOOTBLOCK.
The VBOOT workbuffer is only required when VBOOT_STARTS_BEFORE_BOOTBLOCK
or VBOOT_STARTS_IN_BOOTBLOCK.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I444bede3f2b716e1900e7621453351d7fddadaa3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/cpu')
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/memlayout_transfer_buffer.inc | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 4 |
2 files changed, 6 insertions, 4 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_transfer_buffer.inc b/src/soc/amd/common/block/cpu/noncar/memlayout_transfer_buffer.inc index 1b80f6b291..896512a0cd 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_transfer_buffer.inc +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_transfer_buffer.inc @@ -1,10 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#if CONFIG(VBOOT) +#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) ALIGN_COUNTER(64) _transfer_buffer = .; REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4) +#endif +#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) || CONFIG(VBOOT_STARTS_IN_BOOTBLOCK) ALIGN_COUNTER(64) VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) #endif @@ -15,6 +17,6 @@ CBFS_MCACHE(., CONFIG_CBFS_MCACHE_SIZE) FMAP_CACHE(., FMAP_SIZE) -#if CONFIG(VBOOT) +#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) _etransfer_buffer = .; #endif diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index e1f2765ebb..ff6aebf3fb 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -78,13 +78,13 @@ SECTIONS EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE) REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, 64K, 1) -#if CONFIG(VBOOT) +#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE) #endif #include "memlayout_transfer_buffer.inc" -#if CONFIG(VBOOT) +#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE) #endif _ = ASSERT(BOOTBLOCK_END == ((BOOTBLOCK_END + 0xFFFF) & 0xFFFF0000), "Bootblock end must be 16 bit aligned"); |