diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-11-21 02:12:54 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-11-22 17:35:20 +0000 |
| commit | 9065f4f8ed2facb60df3f4906b8e1e66e8958379 (patch) | |
| tree | 8cc5ad648509e03a4bf4bc7e2f4e08ba1b982cd3 /src/soc/amd/common/block/cpu/noncar/memlayout.ld | |
| parent | 53ed3e501f4744b4dd42c1418819a5546fe4f0cf (diff) | |
soc/amd: move non-CAR linker scripts to common directory
AMD family 17h and newer don't use cache as RAM, since the RAM is
already initialized by the PSP when the x86 cores are released from
reset. Therefore they use a different linker script as the rest of the
x86 chips in coreboot do. Since there will be support for newer
generations than Picasso will be added, move those linker scripts from
soc/amd/picasso to soc/amd/common/block/cpu/noncar.
TEST=Timeless build of amd/mandolin and amd/gardenia result in identical
binaries.
Change-Id: Ie60372aa498b6e505708f97213b502c9d0b3534b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47828
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/cpu/noncar/memlayout.ld')
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/memlayout.ld | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout.ld b/src/soc/amd/common/block/cpu/noncar/memlayout.ld new file mode 100644 index 0000000000..6f5d4cf82f --- /dev/null +++ b/src/soc/amd/common/block/cpu/noncar/memlayout.ld @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#if ENV_SEPARATE_VERSTAGE && CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) + #include "memlayout_psp_verstage.ld" +#else + #include "memlayout_x86.ld" +#endif /* ENV_SEPARATE_VERSTAGE && CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) */ |