diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-25 19:41:58 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-28 16:12:31 +0000 |
commit | b6e36181380b711976d37a490fe2ada96fc4d440 (patch) | |
tree | 57a09efbac0a613389481336407e9c0770c932e7 /src/soc/amd/common/block/acpimmio/mmio_util.c | |
parent | c2a05d143bb87db9177494d3752b4ee2b04cc144 (diff) |
soc/amd/common: Remove guards on ACPIMMIO utils
If one wishes to use the functions guarded here, he
has to have datasheet open anyways. It should be clear
from there which regions are supported and which are not.
TEST=Reproducible build of google/aleena.
Change-Id: I0c1f0c9c9a6711532c5078c08cdf9e6612f3bc9c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/soc/amd/common/block/acpimmio/mmio_util.c')
-rw-r--r-- | src/soc/amd/common/block/acpimmio/mmio_util.c | 84 |
1 files changed, 0 insertions, 84 deletions
diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c index 7fad456106..1fc5fd4ed4 100644 --- a/src/soc/amd/common/block/acpimmio/mmio_util.c +++ b/src/soc/amd/common/block/acpimmio/mmio_util.c @@ -65,9 +65,6 @@ void pm_io_write32(uint8_t reg, uint32_t value) pm_io_write16(reg + sizeof(uint16_t), value & 0xffff); } -#if SUPPORTS_ACPIMMIO_SM_PCI_BASE -/* smbus pci read/write - access registers at 0xfed80000 */ - u8 sm_pci_read8(u8 reg) { return read8((void *)(ACPIMMIO_SM_PCI_BASE + reg)); @@ -97,10 +94,6 @@ void sm_pci_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_SM_PCI_BASE + reg), value); } -#endif - -#if SUPPORTS_ACPIMMIO_SMI_BASE -/* smi read/write - access registers at 0xfed80200 */ uint8_t smi_read8(uint8_t reg) { @@ -131,10 +124,6 @@ void smi_write32(uint8_t reg, uint32_t value) { write32((void *)(ACPIMMIO_SMI_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_SMI_BASE */ - -#if SUPPORTS_ACPIMMIO_PMIO_BASE -/* pm read/write - access registers at 0xfed80300 */ u8 pm_read8(u8 reg) { @@ -165,14 +154,6 @@ void pm_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_PMIO_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_PMIO_BASE */ - -#if SUPPORTS_ACPIMMIO_PMIO2_BASE -/* pm2 read/write - access registers at 0xfed80400 - currently unused by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_BIOSRAM_BASE -/* biosram read/write - access registers at 0xfed80500 */ uint8_t biosram_read8(uint8_t reg) { @@ -208,18 +189,6 @@ void biosram_write32(uint8_t reg, uint32_t value) value >>= 16; biosram_write16(reg + sizeof(uint16_t), value & 0xffff); } -#endif /* SUPPORTS_ACPIMMIO_BIOSRAM_BASE */ - -#if SUPPORTS_ACPIMMIO_CMOSRAM_BASE -/* cmosram read/write - access registers at 0xfed80600 - currently unused by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_CMOS_BASE -/* cmos read/write - access registers at 0xfed80700 - currently unused by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_ACPI_BASE -/* acpi read/write - access registers at 0xfed80800 */ u8 acpi_read8(u8 reg) { @@ -250,10 +219,6 @@ void acpi_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_ACPI_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_ACPI_BASE */ - -#if SUPPORTS_ACPIMMIO_ASF_BASE -/* asf read/write - access registers at 0xfed80900 */ u8 asf_read8(u8 reg) { @@ -274,10 +239,6 @@ void asf_write16(u8 reg, u16 value) { write16((void *)(ACPIMMIO_ASF_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_ASF_BASE */ - -#if SUPPORTS_ACPIMMIO_SMBUS_BASE -/* smbus read/write - access registers at 0xfed80a00 */ u8 smbus_read8(u8 reg) { @@ -298,18 +259,6 @@ void smbus_write16(u8 reg, u16 value) { write16((void *)(ACPIMMIO_SMBUS_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_SMBUS_BASE */ - -#if SUPPORTS_ACPIMMIO_WDT_BASE -/* wdt read/write - access registers at 0xfed80b00 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_HPET_BASE -/* hpet read/write - access registers at 0xfed80c00 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_IOMUX_BASE -/* iomux read/write - access registers at 0xfed80d00 */ u8 iomux_read8(u8 reg) { @@ -340,10 +289,6 @@ void iomux_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_IOMUX_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_IOMUX_BASE */ - -#if SUPPORTS_ACPIMMIO_MISC_BASE -/* misc read/write - access registers at 0xfed80e00 */ u8 misc_read8(u8 reg) { @@ -374,26 +319,6 @@ void misc_write32(u8 reg, u32 value) { write32((void *)(ACPIMMIO_MISC_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_MISC_BASE */ - -#if SUPPORTS_ACPIMMIO_DPVGA_BASE -/* dpvga read/write - access registers at 0xfed81400 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_GPIO0_BASE || SUPPORTS_ACPIMMIO_GPIO1_BASE \ - || SUPPORTS_ACPIMMIO_GPIO2_BASE -/* - * No helpers are currently in use however common/block//gpio.c accesses - * the registers directly. - */ - -/* gpio bk 0 read/write - access registers at 0xfed81500 */ -/* gpio bk 1 read/write - access registers at 0xfed81600 */ -/* gpio bk 2 read/write - access registers at 0xfed81700 */ -#endif - -#if SUPPORTS_ACPIMMIO_XHCIPM_BASE -/* xhci_pm read/write - access registers at 0xfed81c00 */ uint8_t xhci_pm_read8(uint8_t reg) { @@ -424,14 +349,6 @@ void xhci_pm_write32(uint8_t reg, uint32_t value) { write32((void *)(ACPIMMIO_XHCIPM_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_XHCIPM_BASE */ - -#if SUPPORTS_ACPIMMIO_ACDCTMR_BASE -/* acdc_tmr read/write - access registers at 0xfed81d00 - not currently used by any soc */ -#endif - -#if SUPPORTS_ACPIMMIO_AOAC_BASE -/* aoac read/write - access registers at 0xfed81e00 */ u8 aoac_read8(u8 reg) { @@ -442,4 +359,3 @@ void aoac_write8(u8 reg, u8 value) { write8((void *)(ACPIMMIO_AOAC_BASE + reg), value); } -#endif /* SUPPORTS_ACPIMMIO_AOAC_BASE */ |