diff options
author | Marc Jones <marcj303@gmail.com> | 2017-05-15 18:55:11 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-06-26 00:46:18 +0000 |
commit | 1587dc8a2b4ddfe110cd0239c6506a320cccac96 (patch) | |
tree | ab9b3b3ae63461e9fa8caf4c3fe4410f78f664c3 /src/soc/amd/common/agesawrapper.h | |
parent | 21cde8b83227fa324f246672b1e2d58408ea6bf8 (diff) |
soc/amd/stoneyridge: Add northbridge support
Copy northbridge files from northbridge/amd/pi/00670F00
to soc/amd/stoneyridge and soc/amd/common.
Changes:
- update chip_ops and device_ops
- remove multi-node support
- clean up Kconfig and Makefile
Change-Id: Ie86b4d744900f23502068517ece5bcea6c128993
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19724
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/common/agesawrapper.h')
-rw-r--r-- | src/soc/amd/common/agesawrapper.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/src/soc/amd/common/agesawrapper.h b/src/soc/amd/common/agesawrapper.h new file mode 100644 index 0000000000..b7f60ad3f0 --- /dev/null +++ b/src/soc/amd/common/agesawrapper.h @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _AGESAWRAPPER_H_ +#define _AGESAWRAPPER_H_ + +#include <stdint.h> +#include <Porting.h> +#include <AGESA.h> + +/* TODO: Add a kconfig option to name the AGESA ROM file in CBFS */ +#ifndef CONFIG_CBFS_AGESA_NAME +#define CONFIG_CBFS_AGESA_NAME "AGESA" +#endif + +enum { + PICK_DMI, /* DMI Interface */ + PICK_PSTATE, /* Acpi Pstate SSDT Table */ + PICK_SRAT, /* SRAT Table */ + PICK_SLIT, /* SLIT Table */ + PICK_WHEA_MCE, /* WHEA MCE table */ + PICK_WHEA_CMC, /* WHEA CMV table */ + PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ + PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */ + PICK_CRAT, +}; + +AGESA_STATUS agesawrapper_amdinitreset(void); +AGESA_STATUS agesawrapper_amdinitearly(void); +AGESA_STATUS agesawrapper_amdinitenv(void); +AGESA_STATUS agesawrapper_amdinitlate(void); +AGESA_STATUS agesawrapper_amdinitpost(void); +AGESA_STATUS agesawrapper_amdinitmid(void); +AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); +void *agesawrapper_getlateinitptr(int pick); +AGESA_STATUS agesawrapper_amdlaterunaptask(UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume(void); +AGESA_STATUS agesawrapper_amds3laterestore(void); + +AGESA_STATUS agesawrapper_fchs3earlyrestore(void); +AGESA_STATUS agesawrapper_fchs3laterestore(void); + +VOID OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly); +VOID amd_initcpuio(void); +VOID amd_initmmio(void); +const void *agesawrapper_locate_module (const CHAR8 name[8]); + +void OemPostParams(AMD_POST_PARAMS *PostParams); + +#endif /* _AGESAWRAPPER_H_ */ |